Single-ended, feed-forward gain stage

Claim 2

A non-inverting gain stage of an operational amplifier wherein the non-inverting gain stage receives a single input and generates a single-ended output, the non-inverting gain stage comprising: an amplifying MOS transistor having its gate connected to receive the input and its source connected to ground; a current mirror comprising first and second MOS transistors, the commonly-connected gates of the first and second transistors being connected to the drain of the amplifying transistor, the drain of the first transistor also being connected to the gates of the first and second transistors, the commonly-connected sources of the first and second transistors being connected to a supply voltage, the drain of the second transistor being connected to a high impedance output node which is connected to ground through a current load; and a feed-forward capacitor having a first side connected to receive the input and a second side connected to the high impedance output node, the feed-forward capacitor being responsive to the input to feed-forward the input when the input frequency is greater than a preselected value.

Claim 3

A non-inverting gain stage as in claim 1 wherein the preselected value is lower than the unity gain frequency of the operational amplifier.

Claim 4

A non-inverting gain stage of an operational amplifier wherein the non-inverting gain stage receives a single input and generates a single-ended output, the non-inverting gain stage comprising: an amplifying MOS transistor having its gate connected to receive the input and its source connected to ground via a degeneration resistor; a current mirror comprising first and second MOS transistors, the commonly-connected gates of the first and second transistors being connected to the drain of the amplifying transistor, the drain of the first transistor being connected to the gates of the first and second transistors, the commonly-connected sources of the first and second transistors being connected to a supply voltage, the drain of the second transistors being connected to a high impedance output node which is connected to ground through a current load; and a feed-forward capacitor having a first side connected between the source of the amplifying transistor and the degeneration resistor and a second side connected to the high impedance output node, such that the feed-forward capacitor feeds-forward the signal from the source of the amplifying transistor to the high-impedance output node when the input frequency is greater than a preselected value.

Claim 5

A non-inverting gain stage of an operational amplifier wherein the non-inverting gain stage receives a single input and generates a single-ended output, the non-inverting gain stage comprising: an amplifying MOS transistor having its gate connected to receive the input and its source connected to ground via a degeneration resistor; a current mirror comprising first and second MOS transistors, the commonly-connected gates of the first and second transistors being connected to the drain of the amplifying transistor, the drain of the first transistor being connected to the gates of the first and second transistors, the commonly-connected sources of the first and second transistors being connected to a supply voltage, the drain of the second transistors being connected to a high impedance output node which is connected to ground through a current load; and a feed-forward capacitor having a first side connected between the source of the amplifying transistor and the degeneration resistor and a second side connected to the high impedance output node, such that the feed-forward capacitor feeds-forward the signal from the source of the amplifying transistor to the high-impedance output node when the input frequency is greater than a preselected value.

Claim 6

A non-inverting gain stage as in claim 3 wherein the preselected value is lower than the unity gain frequency of the operational amplifier.

Claim 7

A non-inverting gain stage of an operational amplifier wherein the non-inverting gain stage receives a single input and generates a single-ended output via a dc signal path, the non-inverting gain stage comprising: an MOS transistor responsive to the input to amplify the input, the drain of the MOS transistor passing current through a current follower transistor; a current mirror responsive to the amplified input to provide a current output to a current source load, the current output being the drain current of a common-source transistor; and means for bypassing the dc signal path to feed-forward the input to the current source load when the input frequency is greater than a preselected value.

Claim 8

A non-inverting gain stage of an operational amplifier wherein the non-inverting gain stage receives a single input and generates a single-ended output via a dc signal path, the non-inverting gain stage comprising: an MOS transistor responsive to the input to amplify the input, the drain of the MOS transistor passing current through a current follower transistor; a current mirror responsive to the amplified input to provide a current output to a current source load, the current output being the drain current of a common-source transistor; and means for bypassing the dc signal path to feed-forward the input to the current source load when the input frequency is greater than a preselected value.

Claim 9

A non-inverting gain stage of an operational amplifier wherein the non-inverting gain stage receives a single input and generates a single-ended output via a dc signal path, the non-inverting gain stage comprising: an MOS transistor responsive to the input to amplify the input, the drain of the MOS transistor passing current through a current amplifier; a current mirror responsive to the amplified input to provide a current output to a current source load, the current output being the drain of a common-source transistor; and means for bypassing the dc signal path to feed-forward the input to the current source load when the input frequency is greater than a preselected value.

Claim 10

A non-inverting gain stage of an operational amplifier wherein the non-inverting gain stage receives a single input and generates a single-ended output via a dc signal path, the non-inverting gain stage comprising: an MOS transistor responsive to the input to amplify the input, the drain of the MOS transistor passing current through a current amplifier; a current mirror responsive to the amplified input to provide a current output to a current source load, the current output being the drain of a common-source transistor; and means for bypassing the dc signal path to feed-forward the input to the current source load when the input frequency is greater than a preselected value.

Claim 11

A non-inverting gain stage of an operational amplifier wherein the non-inverting gain stage receives a single input and generates a single-ended output via a dc signal path, the non-inverting gain stage comprising: means responsive to the input for amplifying the input; a current mirror responsive to the amplified input to provide a current output to a current source load through a current amplifier, the current output being the drain current of a common-source transistor; and means for bypassing the dc signal path to feed-forward the input to the current source load when the input frequency is greater than a preselected value.

Claim 12

A non-inverting gain stage of an operational amplifier wherein the non-inverting gain stage receives a single input and generates a single-ended output via a dc signal path, the non-inverting gain stage comprising: means responsive to the input for amplifying the input; a current mirror responsive to the amplified input to provide a current output to a current source load through a current amplifier, the current output being the drain current of a common-source transistor; and means for bypassing the dc signal path to feed-forward the input to the current source load when the input frequency is greater than a preselected value.

Claim 13

A gain stage as in claim 5, 6 or 7 wherein the current mirror has a gain other than unity.

Claim 14

A non-inverting gain stage as in claim 5, 6 or 7 wherein the preselected value is lower than the unity gain frequency of the operational amplifier.

Claim 15

A non-inverting gain stage of an operational amplifier wherein the non-inverting gain stage receives a single input and generates a single-ended output, the non-inverting gain stage comprising: an amplifying N-channel MOS transistor having its gate connected to receive the input and its source connected to ground; a current mirror comprising first and second P-channel MOS transistors having commonly-connected gates and commonly-connected sources, the commonly-connected gates of the first and second transistors being connected to the drain of the amplifying transistor, the drain of the first transistor also being connected to the commonly-connected gates of the first and second transistors, the commonly-connected sources of the first and second transistors being connected to a supply voltage, the drain of the second transistor being connected to a high impedance output node which is connected to ground through a current load; a feed-forward capacitor having a first side connected to receive their input and a second side connected to the high impedance output node, the feed-forward capacitor being responsive to the input to feed-forward the input when the input frequency is greater than a preselected value; and a unidirectional voltage follower transistor connected between the input and the feed-forward capacitor to drive the feed-forward capacitor.

Claim 16

A non-inverting gain stage of an operational amplifier wherein the non-inverting gain stage receives a single input and generates a single-ended output, the non-inverting gain stage comprising: an amplifying N-channel MOS transistor having its gate connected to receive the input and its source connected to ground; a current mirror comprising first and second P-channel MOS transistors having commonly-connected gates and commonly-connected sources, the commonly-connected gates of the first and second transistors being connected to the drain of the amplifying transistor, the drain of the first transistor also being connected to the commonly-connected gates of the first and second transistors, the commonly-connected sources of the first and second transistors being connected to a supply voltage, the drain of the second transistor being connected to a high impedance output node which is connected to ground through a current load; a feed-forward capacitor having a first side connected to receive their input and a second side connected to the high impedance output node, the feed-forward capacitor being responsive to the input to feed-forward the input when the input frequency is greater than a preselected value; and a unidirectional voltage follower transistor connected between the input and the feed-forward capacitor to drive the feed-forward capacitor.

Claim 17

A non-inverting gain stage as in claim 10 wherein the voltage follower transistor is a bipolar transistor having its base connected to receive the input, its collector connected to the commonly-connected sources of the first and second current mirror transistors and its emitter connected to the first side of the feed-forward capacitor.

Claim 18

A non-inverting gain stage as in claim 10 wherein the voltage follower transistor is an MOS transistor having its gate connected to receive the input, its drain connected to the commonly-connected sources of the first and second current mirror transistors and its source connected to the first side of the feed forward capacitor.