Circuit arrangement for generating a clock signal which is synchronous in respect of frequency to a reference frequency

Claim 1

In a circuit arrangement for generating a clock signal which is frequency-synchronous with respect to a supplied reference frequency, in which a reference frequency receiving component receives an external reference frequency signal and is connected to a first input of a first phase comparator, in which the first phase comparator is connected by way of an integrator to a first filter which is, in turn, connected to a voltage-controlled oscillator operable to emit the frequency-synchronous clock signal to an output of the circuit arrangement and to a second input of the first phase comparator the improvement comprising: a second phase comparator including a first input and a second input, said second input connected to the output of said voltage-controlled oscillator; a highly-stable normal frequency generator connected to said first input of said second phase comparator; a first switch having two inputs, one of which is connected to an output of said second phase comparator and one of which is connected to at least one from the group consisting of said reference frequency receiving component, said first phase comparator, or said integrator, switching of said first switch being controlled by at least one of the group consisting of said first phase comparator, said first phase comparator, or said integrator, said first switch including first and second outputs such that upon failure of the reference frequency signal or overshooting of a predetermined phase difference between the reference frequency signal and the clock signal the first switch switches over from a first switching position to a second switching position respectively connected to said outputs; a subtractor including a subtrahend input connected to said second phase comparator by said first switch and including a minuend input and an output; a second filter connected to said output of said subtractor; a third filter connected between said first output of said first switch and said minuend input of said subtractor; and a second switching element including first and second inputs, said first input connected to said first filter, said second switch connected to operate in synchronism with said first switch, said second input of said second switch connected to an output of said second filter, said second switch including an output connected to said voltage-controlled oscillator.