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US4829518A Expired / Lapsed US ⏱️ 0.0 years remaining

Multiplexing apparatus having BSI-code processing and bit interleave functions

Assignee: Fujitsu Ltd
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Filing: 1988-03-25
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Granted: 1989-05-09
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Expires: 2008-03-25
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Abstract

Abstract A multiplexing apparatus of a bit interleave type for time-division multiplex on PCM signals of a plurality of channels bit by bit to convert the PCM signals into a high-speed PCM signal. To maintain the advantage of the synchronous multiplex system, the multiplexing apparatus has a BSI-code processing function and a bit interleave function and comprises: a BSI-code adding circuit for adding BSI codes to the PCM signals before multiplexing; a BSI-code position shifting means circuit for shifting the positions of the BSI codes in the PCM signals to different positions respectively with respect to the PCM signals of a plurality of channels; and a multiplexing circuit for multiplexing the outputs of the BSI-code position shifting circuit by a bit-interleave mode.

Inventors

  • 👤 Kazuo Iquchi
  • 👤 Tetsuo Soejima
  • 👤 Kazuo Murano

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 08:05
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/02; H04J3/04; H04J3/047; H04L; H04L7/00; H04L7/0079; H04L7/0083

Claims Analysis

Total Claims: 23
Claim 1
Independent Claim 110 words
A multiplexing apparatus of a bit interleave type for time-division multiplex on PCM signals of a plurality of channels bit by bit to convert said PCM signals into a high-speed PCM signal, said multiplexing apparatus having a BSI-code processing function and a bit interleave function, comprising: a BSI-code adding means for adding BSI codes to said PCM signals before multiplexing; a BSI-code position shifting means for shifting the positions of said BSI codes in said PCM signals to different positions respectively with respect to said PCM signals of a plurality of channels; and a multiplexing means for multiplexing the outputs of said BSI-code position shifting means by a bit-interleave mode.
Claim 2
Dependent Claim 110 words
A multiplexing apparatus of a bit interleave type for time-division multiplex on PCM signals of a plurality of channels bit by bit to convert said PCM signals into a high-speed PCM signal, said multiplexing apparatus having a BSI-code processing function and a bit interleave function, comprising: a BSI-code adding means for adding BSI codes to said PCM signals before multiplexing; a BSI-code position shifting means for shifting the positions of said BSI codes in said PCM signals to different positions respectively with respect to said PCM signals of a plurality of channels; and a multiplexing means for multiplexing the outputs of said BSI-code position shifting means by a bit-interleave mode.
Claim 3
Dependent Claim 33 words
A multiplexing apparatus as set forth in claim 1, wherein said BSI-code position shifting means shifts said positions of said BSI codes in accordance with the numbers of said plurality of channels, respectively.
Claim 4
Dependent Claim 49 words
A multiplexing apparatus as set forth in claim 1, wherein each of said PCM signals comprises a plurality of blocks, and said BSI-code position shifting means shifts only said positions of said BSI codes in said respective blocks in accordance with the numbers of said plurality of channels, respectively.
Claim 5
Dependent Claim 47 words
A multiplexing apparatus as set forth in claim 1, wherein each of said PCM signals comprises a plurality of blocks, and said BSI-code position shifting means shifts each of said blocks entirely by a predetermined value in accordance with the number of said plurality of channels, respectively.
Claim 6
Dependent Claim 54 words
A multiplexing apparatus as set forth in claim 1, wherein, in said BSI-code position shifting means, the shift values of said BSI codes are determined as integer multiples for respective channels in accordance with the numbers of said plurality of channels, respectively, and the shift values are determined to be different for different channels.
Claim 7
Dependent Claim 32 words
A multiplexing apparatus as set forth in claim 5, wherein said shift values are determined to be integer multiples of said channel numbers in said PCM signals of a plurality of channels.
Claim 8
Dependent Claim 18 words
A multiplexing apparatus as set forth in claim 1, wherein said BSI-code adding means utilizes a differential 8B1M.
Claim 9
Dependent Claim 17 words
A multiplexing apparatus as set forth in claim 1, wherein said BSI-code adding means utilizes an 8B1C.
Claim 10
Dependent Claim 24 words
A multiplexing apparatus as set forth in claim 1, wherein said BSI-code adding means utilizes BSI codes already included in the input PCM signals.
Claim 11
Dependent Claim 22 words
A multiplexing apparatus as set forth in claim 1, wherein said BSI-code adding means utilizes BSI codes generated in said multiplexing apparatus.
Claim 12
Dependent Claim 118 words
A multiplexing apparatus of a bit interleave type for time-division multiplex on PCM signals of a plurality of channels bit by bit to convert said PCM signals into a high-speed PCM signal, said multiplexing apparatus having a BSI-code processing function and a bit interleave function, BSI bits being inserted into each predetermined block of input PCM signals in advance, comprising: basic PCM signal channel processing portions each for shifting positions of said BSI bits of said respective channels and for multiplexing the shifted bits with the PCM signals of corresponding channel; the outputs of said basic PCM signal channel processing portions being multiplexed under a bit interleave mode; and the multiplexed signals being inverted at said BSI bits.
Claim 13
Dependent Claim 118 words
A multiplexing apparatus of a bit interleave type for time-division multiplex on PCM signals of a plurality of channels bit by bit to convert said PCM signals into a high-speed PCM signal, said multiplexing apparatus having a BSI-code processing function and a bit interleave function, BSI bits being inserted into each predetermined block of input PCM signals in advance, comprising: basic PCM signal channel processing portions each for shifting positions of said BSI bits of said respective channels and for multiplexing the shifted bits with the PCM signals of corresponding channel; the outputs of said basic PCM signal channel processing portions being multiplexed under a bit interleave mode; and the multiplexed signals being inverted at said BSI bits.
Claim 14
Dependent Claim 171 words
A multiplexing apparatus of a bit interleave type for time-division multiplex on PCM signals of a plurality of channels bit by bit to convert said PCM signals into a high-speed PCM signal, said multiplexing apparatus having a BSI-code processing function and a bit interleave function, comprising: a BSI-code adding means for adding BSI codes to said PCM signals before multiplexing; a basic PCM signal channel processing means; and a multiplexing portion; said basic PCM signal channel processing means including; separating means for separating a frame control signal, a BSI code, and data, included in each frame of the input PCM signals; a memory for temporarily buffering said data; frame control means for changing the channel number in said frame control signal; BSI-code shifting means for shifting said BSI code; and multiplexing means for multiplexing data read from said memory, said frame control signal, and said BSI code; and said multiplexing portion comprising: bit interleave multiplexing means for multiplexing a bit sequence input from said PCM signals of a plurality of channels.
Claim 15
Dependent Claim 171 words
A multiplexing apparatus of a bit interleave type for time-division multiplex on PCM signals of a plurality of channels bit by bit to convert said PCM signals into a high-speed PCM signal, said multiplexing apparatus having a BSI-code processing function and a bit interleave function, comprising: a BSI-code adding means for adding BSI codes to said PCM signals before multiplexing; a basic PCM signal channel processing means; and a multiplexing portion; said basic PCM signal channel processing means including; separating means for separating a frame control signal, a BSI code, and data, included in each frame of the input PCM signals; a memory for temporarily buffering said data; frame control means for changing the channel number in said frame control signal; BSI-code shifting means for shifting said BSI code; and multiplexing means for multiplexing data read from said memory, said frame control signal, and said BSI code; and said multiplexing portion comprising: bit interleave multiplexing means for multiplexing a bit sequence input from said PCM signals of a plurality of channels.
Claim 16
Dependent Claim 49 words
A multiplexing apparatus as set forth in claim 12, wherein each of said PCM signals comprises a plurality of blocks, and said BSI-code position shifting means shifts only said positions of said BSI codes in said respective blocks in accordance with the numbers of said plurality of channels, respectively.
Claim 17
Dependent Claim 46 words
A multiplexing apparatus as set forth in claim 12, wherein each of said PCM signals comprises a plurality of blocks, and said BSI-code shifting means shifts each of said blocks entirely by a predetermined value in accordance with the numbers of said plurality of channels, respectively.
Claim 18
Dependent Claim 54 words
A multiplexing apparatus as set forth in claim 12, wherein, in said BSI-code position shifting means, the shift values of said BSI codes are determined as integer multiples for respective channels in accordance with the numbers of said plurality of channels, respectively, and the shift values are determined to be different for different channels.
Claim 19
Dependent Claim 32 words
A multiplexing apparatus as set forth in claim 15, wherein said shift values are determined to be integer multiples of said channel numbers in said PCM signals of a plurality of channels.
Claim 20
Dependent Claim 18 words
A multiplexing apparatus as set forth in claim 12, wherein said BSI-code adding means utilizes a differential 8B1M.
Claim 21
Dependent Claim 17 words
A multiplexing apparatus as set forth in claim 12, wherein said BSI-code adding means utilizes an 8B1C.
Claim 22
Dependent Claim 24 words
A multiplexing apparatus as set forth in claim 12, wherein said BSI-code adding means utilizes BSI codes already included in the input PCM signals.
Claim 23
Dependent Claim 22 words
A multiplexing apparatus as set forth in claim 12, wherein said BSI-code adding means utilizes BSI codes generated in said multiplexing apparatus.

References Cited (Backward Citations)

US4477900A Cited
US4520480A Cited
US4535451A Cited
US4709227A Cited
US4759018A Cited
US4667324A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-05-08 1992-11-07 1993-05-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-05-08 1996-11-07 1997-05-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-05-08 2000-11-07 2001-05-09 $7700.00 Window Closed / Lapsed

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