Fourth-order digital multiplex system for transmitting a plurality of digital signals at a nominal bit rate of 44 736 kbit/s

Claim 1

A fourth-order digital multiplex system comprising a transmitter having a digital multiplexer and a receiver having a digital demultiplexer for TDM transmission of a plurality of digital signals at a nominal third-order bit rate of 44,736 kbit/s over a common digital path between the said multiplexer and the said demultiplexer, characterized in that the said multiplexer is adapted for cyclically bit-wise interleaving three digital signals having nominal third-order bit rates of 44,736 kbit/s into a composite digital signal having a nominal fourth-order bit rate of 139,264 kbit/s and a frame comprising a 12 bit frame alignment signal, a number of service bits and, in addition, for each of the said three signals, a number N of information bits as well as one justification bit with five associated justification service bits, the said number N being such that the nominal justification ratio of the composite digital signal is in the range from 0.40 to 0.60 but exclusive of the range from 0.46 to 0.54, which frame is arranged in six consecutive sets having equal numbers of bit time slots, wherein the bits of the frame alignment signal occupy the first 12 bit positions of the first set, the justification service bits of the first, second and third of the said three signals occupy the first, second and third bit positions, respectively of, in succession, the second set to the sixth set, the service bits occupy the bit positions following after the third bit position in the fourth set, and the information bits of the said three signals cyclically occupy the remaining bit positions of the six sets; and the said demultiplexer is adapted for separating the said composite signal into the said three signals.