Semiconductor device

Claim 2

A semiconductor device having a memory cell array provided with a plurity of word lines extending in parallel with one another, and wherein each of said word lines has a length and includes a main word line extending along the entire length of said word line and an auxiliary word line extending along and over only part of said word line, and wherein each said auxiliary word line of adjacent ones of said word lines are staggered such that adjacent ones of each said auxiliary word line do not overlap in lengthwise extent.

Claim 3

A device according to claim 1, wherein each said auxiliary word line is respectively connected by contacts to the corresponding ones of said main word lines.

Claim 4

A device according to claim 2, wherein each said auxiliary word line comprises auxiliary word line segments arranged along said main word line and which are separated from each other along said main word line by portions of said main word line where said auxiliary word line segments are not provided, each of said auxiliary word line segments have two ends, and respective ones of said contacts are disposed at each of said two ends of each of said auxiliary word line segments.

Claim 5

A device according to claim 1, wherein each said auxiliary word line is formed of a material having a smaller resistivity than that forming said main word line.

Claim 6

A device according to claim 4, wherein said main word line is formed of polycide.

Claim 7

A device according to claim 1, wherein each said auxiliary word line is formed of metal.

Claim 8

A device according to claim 1, wherein said memory array comprises sections which are divisions by imaginary lines orthogonal to said word lines, wherein odd-numbered sections of alternate ones of said word lines are provided with respective ones of each said auxiliary word line, wherein said alternate word lines are separated by intervening word lines, and even-numbered sections of said intervening word lines are provided with said auxiliary word line, such that respective ones of each said auxiliary word line are staggered with respect to the length dimension along adjacent word lines.

Claim 9

A device according to claim 7, wherein each of said sections have substantially equal dimension in the direction of said word lines.

Claim 10

A device according to claim 6, wherein each said auxiliary word line is formed of aluminum.

Claim 11

A device according to claim 4, wherein said main word lines are formed of polycide.

Claim 12

A device according to claim 4, wherein each said auxiliary word line is formed of metal.

Claim 13

A device according to claim 1, further comprising an insulating layer separating said main word line and a corresponding said auxiliary word line, and wherein each respective said auxiliary word line is connected to a respective one of said main lines by contacts disposed in openings through said insulating layer.

Claim 14

A device according to claim 1, wherein each said auxiliary word line has substantially the same length taken along with length direction of said word line.

Claim 15

A device according to claim 1, wherein said main word lines are formed of polycide and said auxiliary word line is formed of metal.

Claim 16

A device according to claim 1, wherein respective ones of each said auxiliary word line are respectively provided intermittently over each of said main word lines.

Claim 17

A device according to claim 3, wherein said contacts are provided only at each of said two ends of each of said auxiliary word line segments.

Claim 18

A semiconductor device including a memory cell array having a plurality of main word lines extending in parallel with one another, each of said main word lines including auxiliary word line segments extending periodically along and over said main word line, each of said auxiliary word line segments being connected at each end by contacts to said main word line, and wherein said auxiliary word line segments are staggered with respect to the length direction along adjacent ones of said main word lines such that said auxiliary word line sigments of adjacent ones of said main word lines do not overlap in lengthwise extent.

Claim 19

A semiconductor device including a memory cell array having a plurality of main word lines extending in parallel with one another, each of said main word lines including auxiliary word line segments extending periodically along and over said main word line, each of said auxiliary word line segments being connected at each end by contacts to said main word line, and wherein said auxiliary word line segments are staggered with respect to the length direction along adjacent ones of said main word lines such that said auxiliary word line sigments of adjacent ones of said main word lines do not overlap in lengthwise extent.

Claim 20

A semiconductor device as defined in claim 17, wherein approximately half the length of each said main word line is occupied by said auxiliary word line segments.

Claim 21

A semiconductor device as defined in claim 18, wherein said auxiliary word line segments are composed of aluminum, and said main word lines are composed of polycide.