Patent US4824254A successfully refreshed from Google Patents.
US4824254A
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US
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Alignment marks on semiconductor wafers and method of manufacturing the marks
Assignee: Oki Electric Industry Co Ltd
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Filing: 1984-05-18
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Granted: 1989-04-25
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Expires: 2004-05-18
Abstract
Abstract Alignment marks on a semiconductor wafer comprise a first alignment island projecting from a surface of the wafer and a second alignment island having substantially the same height as the first alignment island and surrounding the same with a slit therebetween. The slit is utilized as a pattern for aligning with an alignment mark on a photomask. Preferably the alignment marks are formed on the grid line region of the wafer.
Inventors
- 👤 Hiroshi Ohtsuka
- 👤 Yoshio Itoh
- 👤 Tadashi Nishimuro
- 👤 Hisamitsu Mitsutomi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 21:35
CPC Classifications
H; H10; H10P; H10P95/00; G; G03; G03F; G03F9/00; G03F9/70; G03F9/7073; G03F9/7076
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
120 words
An alignment mark on a semiconductor wafer, comprising: a first alignment island of phospho-silicate glass projecting from a surface of said wafer; and a second alignment island of polycrystalline silicon having substantially the same height as said first alignment island and surrounding said first alignment island and spaced therefrom to form a slit having a rectangular or square form therebetween, said slit having a width of no more than about 1 micron, the opposed surfaces of said islands defining said slit therebetween being roughened for attenuation, through random reflection, light entering said slit, whereby when said slit is utilized as a pattern for aligning with an alignment mark on a photomask, said slit is observed as a clear black line.
Claim 2
Dependent Claim
120 words
An alignment mark on a semiconductor wafer, comprising: a first alignment island of phospho-silicate glass projecting from a surface of said wafer; and a second alignment island of polycrystalline silicon having substantially the same height as said first alignment island and surrounding said first alignment island and spaced therefrom to form a slit having a rectangular or square form therebetween, said slit having a width of no more than about 1 micron, the opposed surfaces of said islands defining said slit therebetween being roughened for attenuation, through random reflection, light entering said slit, whereby when said slit is utilized as a pattern for aligning with an alignment mark on a photomask, said slit is observed as a clear black line.
Claim 3
Dependent Claim
22 words
An alignment mark according to claim 1 wherein said first and second alignment islands are each 3000 through 5000 angstroms in thickness.
Claim 4
Dependent Claim
20 words
An alignment mark according to claim 1 wherein said alignment mark is in a grid line on said semiconductor wafer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-04-24 | 1992-10-24 | 1993-04-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-04-24 | 1996-10-24 | 1997-04-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-04-24 | 2000-10-24 | 2001-04-25 | $7700.00 | Window Closed / Lapsed |