Spurless fractional divider direct digital frequency synthesizer and method

Claim 2

A digital frequency synthesizer comprising: counter circuit means for receiving input signal pulses and for providing a corresponding output signal after receiving a number of input signal pulses, the number being selected in response to a control signal; generator circuit means for generating a substantially random sequence of numbers; and comparator circuit means for comparing a respective to the generated numbers to a predetermined number and for providing the control signal.

Claim 3

The synthesizer of claim 1 wherein said generator circuit means comprises a random number generator.

Claim 4

The synthesizer of claim 2 wherein said generator circuit means comprises a pseudo-random number generator.

Claim 5

The synthesizer of claim 1 wherein said comparator circuit means compares the magnitude of the respective generated number to the magnitude of the predetermined number.

Claim 6

The synthesizer of claim 4 wherein said comparator circuit means provides a control signal characterized by a first state when the respective generated number is greater in magnitude than the predetermined number and provides a control signal characterized by a second state when the respective generated number is lesser in magnitude than the predetermined number.

Claim 7

The synthesizer of claim 1 wherein the number is selected from a set of positive integers.

Claim 8

The synthesizer of claim 6 wherein the set includes at least two binary integers.

Claim 9

The synthesizer of claim 1 wherein the set includes n and n+1, where n is a binary integer.

Claim 10

A direct digital frequency synthesizer comprising: counter circuit means for receiving input signal pulses and for providing a corresponding output signal after receiving a number of input pulses, the number being selected from a set including n and n+1, where n and n+1 are binary integers, based upon a state of a control signal; generator circuit means for generating a substantially random sequence of numbers; and comparator circuit means for comparing a magnitude of a respective of the generated numbers to a magnitude of a predetermined number and for providing a control signal characterized by a first state when the respective generated number is greater in magnitude than the predetermined number and provides a control signal characterized by a second state when the respective generated number is lesser in magnitude than the predeterminned number.

Claim 11

A direct digital frequency synthesizer comprising: counter circuit means for receiving input signal pulses and for providing a corresponding output signal after receiving a number of input pulses, the number being selected from a set including n and n+1, where n and n+1 are binary integers, based upon a state of a control signal; generator circuit means for generating a substantially random sequence of numbers; and comparator circuit means for comparing a magnitude of a respective of the generated numbers to a magnitude of a predetermined number and for providing a control signal characterized by a first state when the respective generated number is greater in magnitude than the predetermined number and provides a control signal characterized by a second state when the respective generated number is lesser in magnitude than the predeterminned number.

Claim 12

The synthesizer of claim 9 wherein each number in the substantially random sequence of numbers is within a range from 0 to 2 N , where N is a positive integer, and N≠0; and wherein the predetermined number also is within the range from 0 to 2 N .

Claim 13

The synthesizer of claim 9 wherein each number in the substantially random sequence of numbers is within a range from 0 to 2 N -1, where N is a positive integer and N≠0; and wherein the predetermined number also is within the range from 0 to 2 N -1.