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US4814841A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Toshiba Corp
•
Filing: 1987-01-30
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Granted: 1989-03-21
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Expires: 2007-01-30
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Abstract

Abstract A semiconductor device which comprises an N channel MOS transistor deposited on a P conductivity substrate, a P channel MOS transistor mounted on said N channel MOS transistor, and a high melting metal layer interposed between the drain regions of said first and second MOS transistors in a direction perpendicular to the surface of said semiconductor device to thereby effect ohmic contact between said drain regions.

Inventors

  • 👤 Fujio Masuoka
  • 👤 Kiyofumi Ochii

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 16:43
CPC Classifications
H; H10; H10D; H10D88/00; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/856; H10D84/8311; H10D84/8312; Y; Y10; Y10S; Y10S257/00; Y10S257/903

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 119 words
A semiconductor device comprising: a first MOS transistor of a first channel type formed on a semiconductor substrate; a second MOS transistor of a second channel type formed on said first MOS transistor, said second MOS transistor having a gate electrode common to said first MOS transistor, said gate electrode being made of polysilicon; and a polysilicon layer and a polycide layer of a high melting metal, which are interposed between the drain region of said first MOS transistor and the drain region of said second MOS transistor, said polysilicon layer being formed on that drain region having a conductivity type the same as said common gate electrode, and said polycide layer being formed on the other drain region.
Claim 2
Dependent Claim 119 words
A semiconductor device comprising: a first MOS transistor of a first channel type formed on a semiconductor substrate; a second MOS transistor of a second channel type formed on said first MOS transistor, said second MOS transistor having a gate electrode common to said first MOS transistor, said gate electrode being made of polysilicon; and a polysilicon layer and a polycide layer of a high melting metal, which are interposed between the drain region of said first MOS transistor and the drain region of said second MOS transistor, said polysilicon layer being formed on that drain region having a conductivity type the same as said common gate electrode, and said polycide layer being formed on the other drain region.
Claim 3
Dependent Claim 36 words
A semiconductor device according to claim 1, said first MOS transistor of said first channel type is an N channel type and said second MOS transistor of said second channel type is a P channel type.
Claim 4
Dependent Claim 38 words
A semiconductor device according to claim 1, in which said first MOS transistor of said first channel type is a P channel type and said second MOS transistor of said second channel type is an N channel type.
Claim 5
Dependent Claim 21 words
A semiconductor device according to claim 1, in which said conductivity type of said common gate is an N conductivity type.
Claim 6
Dependent Claim 21 words
A semiconductor device according to claim 1, in which said conductivity type of said common gate is a P conductivity type.

References Cited (Backward Citations)

US4333099A Cited
US4272880A Cited
US4276688A Cited
US4476475A Cited
US4554572A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-03-20 1992-09-19 1993-03-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-03-20 1996-09-19 1997-03-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-03-20 2000-09-19 2001-03-21 $7700.00 Window Closed / Lapsed

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