US4813772A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electro-optical interface
Assignee: REGENTS OF UNIVERSITY 2150 SHATTUCK AVENUE SUITE 1000-A BERKELEY CA 94720 A CORP OF CA
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Filing: 1987-09-08
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Granted: 1989-03-21
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Expires: 2007-09-08
Abstract
Abstract Two electro-optical computer interface embodiments provide for one-way read only and two-way optical read and write. The two-way embodiment includes a main module having a shared memory, and a processor/controller and a main bus. A plurality of local processor modules each includes a local memory, a local processor, and a local bus. The processors are electrically joined by control conductors which provide for coordination and timing between local processors and the main processor. Each memory array has a film deposited on it by the Langmuir/Blodgett technique. The memory arrays are each illuminated by a pulsed laser or Q-switched laser. The film is responsive to the electric fields in the memory array cells for modulating the illumination light. The image is then read onto other memory arrays which are responsive to the illumination for transferring the data between memories.
Inventors
- 👤 Stephen T. Kowel
- 👤 Norman Matloff
- 👤 Charles Eldering
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 02:36
CPC Classifications
G; G06; G06E; G06E1/00
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
243 words
In a multiprocessor computer system containing a plurality of processors, an electro-optical interface for communicating simultaneously between one processor and each of a plurality of other processors in the system comprising: a first integrated-circuit memory associated with the one processor and having a first planar array of bit cells, each cell storing a bit-indicating charge, such that the memory state of the first memory is represented by a planar array of bit-value-indicating charges; an electro-optical film material associated with each bit cell in the first memory and responsive to electric fields produced by the bit-indicating charges stored in said cells for producing optical characteristics indicative of the bit values, such that the memory state of the first memory is represented by first planar array of bit-value-indicating optical characteristics; means for generating a fist optical image of said first array of bit-value-indicating optical chracteristics; a second integrated-circuit memory associated with each of the other processors in the system, each second memory having a second planar array of bit cells in substantially the same arrangement as said first array of bit cells, said second-array bit cells in each of said second memories being responsive to the optical image of said fist array for assuming a one-to-one bit value mapping of said first memory, when said optical image is directed onto that second-memory planar array; and means coupled to said first image-generating means for directing said optical image simultaneously onto each of said second-memory planar arrays.
Claim 2
Dependent Claim
243 words
In a multiprocessor computer system containing a plurality of processors, an electro-optical interface for communicating simultaneously between one processor and each of a plurality of other processors in the system comprising: a first integrated-circuit memory associated with the one processor and having a first planar array of bit cells, each cell storing a bit-indicating charge, such that the memory state of the first memory is represented by a planar array of bit-value-indicating charges; an electro-optical film material associated with each bit cell in the first memory and responsive to electric fields produced by the bit-indicating charges stored in said cells for producing optical characteristics indicative of the bit values, such that the memory state of the first memory is represented by first planar array of bit-value-indicating optical characteristics; means for generating a fist optical image of said first array of bit-value-indicating optical chracteristics; a second integrated-circuit memory associated with each of the other processors in the system, each second memory having a second planar array of bit cells in substantially the same arrangement as said first array of bit cells, said second-array bit cells in each of said second memories being responsive to the optical image of said fist array for assuming a one-to-one bit value mapping of said first memory, when said optical image is directed onto that second-memory planar array; and means coupled to said first image-generating means for directing said optical image simultaneously onto each of said second-memory planar arrays.
Claim 3
Dependent Claim
174 words
The system of claim 1 wherein at least one of the other processors in the system includes a transmitting memory having such an electro-optical film material associated with each bit cell in that memory and which is responsive to electric fields produced by the bit-indicating charges stored in said cells for producing optical characteristics indicative of the bit values, such that the memory state of the transmitting memory device is represented by a second planar array of bit-value-indicating optical characteristics, second means for generating a second optical image of said second planar array of bit-value-indicating optical characteristics; and means coupled to said second image-generating means and responsive to the second bit-value-indicating image for transmitting the second optical image onto a planar array of bit cells in a memory associated with the one processor, which is responsive to the second optical image for assuming a one-to-one bit value mapping of said transmitting memory, and control means coupled to said memories for generating a control signal for enabling selected memories to respond to said optical images.
Claim 4
Dependent Claim
47 words
The system of claim 2 wherein at least one of said first and second optical images is a modulation of a polarized incident light and said light source produces polarized light; said corresponding image-generating means further comprising a polarizing filter optically interposed said first and second memories.
Claim 5
Dependent Claim
34 words
The system of claim 1, wherein said means for generating the first optical image includes means for directing a light beam onto said first-memory array, and said first-memory optical image is a reflected-beam image.
Claim 6
Dependent Claim
51 words
The method of claim 4, wherein said light beam is polarized, said optical characteristics are related to changes in the polarization of light reflected by the film, according to changes in the corresponding bit-value-indicating charges, and said coupling means includes a polarizing filter through which the reflected-beam optical image is directed.
Claim 7
Dependent Claim
51 words
The system of claim 1, wherein said first memory device includes surface regions in addition to said bit cells which are responsive to illumination, to change the memory stae of the device, which further includes a mask covering said surface regions, to prevent illumination of the regions by said light beam.
Claim 8
Dependent Claim
23 words
The system of claim 1, wherein said first memory is a shared central memory device, and said second memories are peripheral memory devices.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-03-20 | 1992-09-19 | 1993-03-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-03-20 | 1996-09-19 | 1997-03-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-03-20 | 2000-09-19 | 2001-03-21 | $7700.00 | Window Closed / Lapsed |