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US4812975A Expired / Lapsed US ⏱️ 0.0 years remaining

Emulation method

Assignee: Hitachi Ltd
•
Filing: 1984-07-11
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Granted: 1989-03-14
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Expires: 2004-07-11
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Abstract

Abstract A method for emulating programs in a system includes a plurality of first and second data processors having different instruction word sets. An instruction which interrupts the operating system on the first data processor is defined. When the instruction is detected in a program running on the first data processor, it is determined whether or not the instruction is an instruction associated with an input/output macro instruction. If it is found, as a result of the determination, that this is the case, an interrupt is caused in a program running on the second data processor which controls the emulation, and the input/output macro instruction output from an emulated program is translated into an input/output macro instuction for the operating system, thereby implementing an emulation with a minimized overhead.

Inventors

  • 👤 Shigemi Adachi
  • 👤 Yoshitake Nakaosa
  • 👤 Yoshiki Fujioka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 21:53
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/44; G06F9/455; G06F9/45533; G06F9/45537; G06F9/45554

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 162 words
An emulation method for emulating programs in a system having a target machine and a native machine, and in which data processing is conducted in the target machine with a plurality of programs having a different instruction word set than the native machine, comprising the steps of: a. detecting an interrupt instruction defined in a first program in which an instruction of said target machine is executed; b. determining whether or not said interrupt instruction is an input/output control macro instruction by use of an operand value of said interrupt instruction; and c. if said interrupt instruction is determined to be an instruction associated with an input/output control macro instruction in said step b, bypassing the operation system of said target machine by translating said input/output control macro instruction from said first program into an input/output control macro instruction for a second program, in which an instruction of said native machine is executed, under control of a program for controlling said emulation.
Claim 2
Dependent Claim 162 words
An emulation method for emulating programs in a system having a target machine and a native machine, and in which data processing is conducted in the target machine with a plurality of programs having a different instruction word set than the native machine, comprising the steps of: a. detecting an interrupt instruction defined in a first program in which an instruction of said target machine is executed; b. determining whether or not said interrupt instruction is an input/output control macro instruction by use of an operand value of said interrupt instruction; and c. if said interrupt instruction is determined to be an instruction associated with an input/output control macro instruction in said step b, bypassing the operation system of said target machine by translating said input/output control macro instruction from said first program into an input/output control macro instruction for a second program, in which an instruction of said native machine is executed, under control of a program for controlling said emulation.
Claim 3
Dependent Claim 46 words
An emulation method according to claim 1, further comprising the step of: d. causing an interrupt in an operating system for said first program is said interrupt instruction is not determined to be an instruction associated with an input/output control macro instruction in said step b.
Claim 4
Dependent Claim 191 words
An emulation method of emulating programs in a system having a target machine and a native machine, and in which data processing is conducted in the target machine, with a plurality of programs having a different instruction work set than the native machine, comprising the steps of: a. detecting an interrupt instruction existing in a first program in which an instruction of said target machine is executed; b. searching a table by use of an operand of said interrupt instruction; c. determining whether or not the value of a code obtained from said table is equal to a predetermined value; d. saving a program status word indicating the current emulation mode in a predetermined memory area if said value is determined to be equal to said predetermined value in said step c; e. loading said program status word as an interrupt in an emulation program; and f. releasing said emulation mode and bypassing the operating system of said target machine by translating an input/output control macro instruction from said first program into an input/output control macro instruction for a second program in which an instruction of said native machine is executed.
Claim 5
Dependent Claim 191 words
An emulation method of emulating programs in a system having a target machine and a native machine, and in which data processing is conducted in the target machine, with a plurality of programs having a different instruction work set than the native machine, comprising the steps of: a. detecting an interrupt instruction existing in a first program in which an instruction of said target machine is executed; b. searching a table by use of an operand of said interrupt instruction; c. determining whether or not the value of a code obtained from said table is equal to a predetermined value; d. saving a program status word indicating the current emulation mode in a predetermined memory area if said value is determined to be equal to said predetermined value in said step c; e. loading said program status word as an interrupt in an emulation program; and f. releasing said emulation mode and bypassing the operating system of said target machine by translating an input/output control macro instruction from said first program into an input/output control macro instruction for a second program in which an instruction of said native machine is executed.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-03-13 1992-09-12 1993-03-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-03-13 1996-09-12 1997-03-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-03-13 2000-09-12 2001-03-14 $7700.00 Window Closed / Lapsed

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