Clamping circuit for an analog to digital converter

Claim 2

A circuit for converting an analogue input signal having information periods which are separated by blanking periods to a digital output signal, said converter circuit comprising: (A) an analogue to digital converter for generating said digital output signal as a function of a clamped analogue signal applied thereo; (B) a clamping circuit for clamping said input signal to a level which is spaced by a predetermined amount from a reference signal, said clamping circuit including: (1) reference signal generating means for providing an analogue reference signal which is nominally constant during said information periods but which spikes to a peaked level and then returns to its constant level during said blanking periods; (2) a negative feedback circuit for generating a biasing signal during said blanking periods as a function of said digital output signal, said feedback circuit comprising: (a) a comparator for comparing said digital output signal with a digital reference value to provide an output whose polarity depends on the result of said comparison; (b) an integrator for integrating said output of said comparator and generating said biasing signal as a function thereof; and (C) means for combining said analogue input signal, said biasing signal and said reference signal to generate said clamped analogue signal as a function thereof.

Claim 3

Apparatus according to claim 1, wherein said combining means first combines said first input signal and said biasing signal and then combines the resultant signal with said reference signal.

Claim 4

Apparatus according to claim 1, wherein said combining means first combines said reference signal and said biasing signal and then combines the resultant signal with said first input signal.

Claim 5

Apparatus according to claim 1, in which said comparator output has positive and negative polarity when the converter is more than and less than said digital reference value, respectively, and said integrator generates a negative integral of its input.

Claim 6

Apparatus according to claim 1, further comprising a switch operable to make or break a connection between said comparator and said integrator.

Claim 7

Apparatus according to claim 5, comprising means for closing said switch only during said blanking periods.

Claim 8

Apparatus according to claim 1, in which said reference signal spikes a negative-going peak which has a substantially vertical leading edge and a substantially exponential trailing edge.

Claim 9

Apparatus according to claim 1, in which said integrator and said combining means each comprise an operational amplifier.

Claim 10

A signal processing circuit for analogue signals having periodic blanking periods during which the signal has a nominally constant voltage, the circuit comprising: an analogue to digital converter; and clamping means operable to maintain a threshold of said converter at a voltage level relatively slightly displaced in one sense from said nominally constant voltage and to maintain the adjacent corresponding threshold of said converter to be relatively greatly displaced in the opposite sense from said nominally constant voltage, irrespective of changes in the d.c. level of said signal.

Claim 11

A signal processing circuit for analogue signals having periodic blanking periods during which the signal has a nominally constant voltage, the circuit comprising: an analogue to digital converter; and clamping means operable to maintain a threshold of said converter at a voltage level relatively slightly displaced in one sense from said nominally constant voltage and to maintain the adjacent corresponding threshold of said converter to be relatively greatly displaced in the opposite sense from said nominally constant voltage, irrespective of changes in the d.c. level of said signal.

Claim 12

Apparatus according to claim 9, wherein said analogue input signal is an analogue television signal, and further comprising a gamma correction circuit for correcting the output of said converter.

Claim 13

Apparatus according to claim 9 wherein the maintained threshold is a threshold corresponding to a change in the most significant bit provided by said converter.

Claim 14

Apparatus according to claim 10 wherein said converter is an iterative converter.

Claim 15

Apparatus according to claim 9, wherein the maintained threshold is a threshold corresponding to a change in the most significant byte provided by said converter.

Claim 16

A signal processing unit for analogue signals having periodic blanking periods during which the signal has a nominally constant voltage, the circuit comprising: (A) an analogue to digital converter; and (B) clamping means operable to maintain a threshold of said converter at a voltage level relatively slightly displaced in one sense from said nominally constant voltage and to maintain the adjacent corresponding threshold of said converter to be relatively greatly displaced in the opposite sense from said nominally constant voltage, irrespective of changes in the d.c. level of said signal; said clamping means comprising: (1) means for providing a reference signal which is nominally constant except during said blanking periods, said reference signal spiking to a peak level and then returning to its constant level during said blanking periods; (2) combining means for combining an input signal and said reference signal to provide an input for said converter; and (3) a negative feedback circuit for biasing the input for said converter, said negative feedback circuit comprising: (a) a comparator for comparing the output of said converter with a digital reference value to provide an output whose polarity depends on the result of the comparison; (b) an integrator for integrating the output of said comparator; and (c) means for biasing the input of said converter according to the level of the output of said integrator.

Claim 17

A signal processing unit for analogue signals having periodic blanking periods during which the signal has a nominally constant voltage, the circuit comprising: (A) an analogue to digital converter; and (B) clamping means operable to maintain a threshold of said converter at a voltage level relatively slightly displaced in one sense from said nominally constant voltage and to maintain the adjacent corresponding threshold of said converter to be relatively greatly displaced in the opposite sense from said nominally constant voltage, irrespective of changes in the d.c. level of said signal; said clamping means comprising: (1) means for providing a reference signal which is nominally constant except during said blanking periods, said reference signal spiking to a peak level and then returning to its constant level during said blanking periods; (2) combining means for combining an input signal and said reference signal to provide an input for said converter; and (3) a negative feedback circuit for biasing the input for said converter, said negative feedback circuit comprising: (a) a comparator for comparing the output of said converter with a digital reference value to provide an output whose polarity depends on the result of the comparison; (b) an integrator for integrating the output of said comparator; and (c) means for biasing the input of said converter according to the level of the output of said integrator.

Claim 20

A method according to claim 15 including biassing the input signal before the signals are combined.

Claim 21

A method according to claim 15 including biassing the reference signal before the signals are combined.

Claim 22

A method according to claim 15 in which the result signal has positive and negative polarity when the converter output is more and less, respectively, than the reference value, and a negative integral of the result signal is formed.

Claim 23

A method according to claim 15 wherein integration only takes place during blanked periods of the input signal and wherein the biassing level is held at the level obtaining at the end of a blanking period during the succeeding unblanked period.

Claim 24

A method according to claim 15 in which said peak is negative-going and at a substantially vertical leading edge and a substantially exponential trailing edge.

Claim 27

A method according to claim 21 including biassing the input signal before the signals are combined.

Claim 28

A method according to claim 21 wherein the output for the following stage is the biassed input signal.

Claim 31

A method according to claim 24, applied to television signals, in which gamma correction is applied to the output of the converter.

Claim 32

A method according to claim 24, wherein the maintained threshold is a threshold corresponding to a change in the most significant bit provided by the converter.

Claim 33

A method according to claim 24, in which the converter is an iterative converter.

Claim 36

A telecine projector comprising an analogue to digital converter for converting video signals generated by scanning a film image, and a clamping circuit comprising: means for providing a reference signal which is nominally constant except during blanking periods of the input signal to said converter and having peaks which occur during said blanking periods; combining means for combining an input signal and said reference signal to provide an input for said converter; a negative feedback circuit for biasing the input of said converter, said negative feedback circuit comprising: a comparator for comparing the output of said converter with a digital reference value to provide an output whose polarity depends on the result of the comparison; an integrator for integrating the output of said comparator; means for biasing the input of said converter according to the level of the input of said integrator; and the clamping circuit being arranged to clamp a transition in the converter input to a signal level just below the black level of the video signal.

Claim 37

A telecine projector comprising an analogue to digital converter for converting video signals generated by scanning a film image, and a clamping circuit comprising: means for providing a reference signal which is nominally constant except during blanking periods of the input signal to said converter and having peaks which occur during said blanking periods; combining means for combining an input signal and said reference signal to provide an input for said converter; a negative feedback circuit for biasing the input of said converter, said negative feedback circuit comprising: a comparator for comparing the output of said converter with a digital reference value to provide an output whose polarity depends on the result of the comparison; an integrator for integrating the output of said comparator; means for biasing the input of said converter according to the level of the input of said integrator; and the clamping circuit being arranged to clamp a transition in the converter input to a signal level just below the black level of the video signal.

Claim 38

An iterative analogue to digital converter including first and second stages, said first stage of said iterative analogue/digital converter comprising: (A) an analogue to digital converter for generating said digital output signal as a function of a clamped analogue signal applied thereto; (B) a clamping circuit for clamping said input signal to a level which is spaced by a predetermined amount from a reference signal, said clamping circuit including: (1) reference signal generating means for providing an analogue reference signal which is nominally constant during said information periods but which spikes to a peaked level and then returns to its constant level during said blanking periods; (2) a negative feedback circuit for generating "said biasing signal" during said blanking periods as a function of said digital output signal, said feedback circuit comprising: (a) a comparator for comparing said digital output signal with a digital reference value to provide an output whose polarity depends on the result of said comparison, and (b) an integrator for integrating said output of said comparator and generating "said biasing signal" as a function thereof; and (C) means for combining said analogue input signal, "said biasing signal" and said reference signal to generate said clamp analogue signal as a function thereof, said clamped analogue signal being applied as an input to said second stage of said iterative converter.

Claim 39

An iterative analogue to digital converter including first and second stages, said first stage of said iterative analogue/digital converter comprising: (A) an analogue to digital converter for generating said digital output signal as a function of a clamped analogue signal applied thereto; (B) a clamping circuit for clamping said input signal to a level which is spaced by a predetermined amount from a reference signal, said clamping circuit including: (1) reference signal generating means for providing an analogue reference signal which is nominally constant during said information periods but which spikes to a peaked level and then returns to its constant level during said blanking periods; (2) a negative feedback circuit for generating "said biasing signal" during said blanking periods as a function of said digital output signal, said feedback circuit comprising: (a) a comparator for comparing said digital output signal with a digital reference value to provide an output whose polarity depends on the result of said comparison, and (b) an integrator for integrating said output of said comparator and generating "said biasing signal" as a function thereof; and (C) means for combining said analogue input signal, "said biasing signal" and said reference signal to generate said clamp analogue signal as a function thereof, said clamped analogue signal being applied as an input to said second stage of said iterative converter.