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Continuous mode auto-zero offset amplifier or integrator

Assignee: General Electric Co
•
Filing: 1988-04-04
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Granted: 1989-02-28
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Expires: 2008-04-04
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Abstract

Abstract An error signal, i.e., offset, noise or drift, is sampled in an input capacitor at an error sampling interval and held during the amplification interval. During the amplification interval, the signal is amplified offset-free. The circuit has two paths which operate alternately in such a way that the signal path is never interrupted, except for very brief intervals. Each of the two paths includes an operational amplifier, and the offset voltages of the two operational amplifiers are cancelled out automatically.

Inventors

  • 👤 Miran Milkovic

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 06:45
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/30; H03F1/303

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 163 words
A continuous mode auto-zero offset amplifier comprising: an input terminal, an output terminal, and first and second circuit paths extending between said input terminal and said output terminal; first and second operational amplifiers respectively connected in said first and second circuit paths, each of said first and second operational amplifiers having a summing junction and an input capacitor connected to said summing junction; a feedback capacitor; and switching means for coupling to a reference voltage in an alternate manner one or the other input capacitor of said first and second amplifiers, for coupling said output terminal in an alternate manner to one or an other output of said first and second amplifiers, and for coupling said feedback capacitor in an alternate manner between the output and the summing junction of one or the other of said first and second amplifiers, respectively, so as to charge the input capacitor of said first and second amplifiers, respectively, to an error voltage in an alternate manner.
Claim 2
Dependent Claim 163 words
A continuous mode auto-zero offset amplifier comprising: an input terminal, an output terminal, and first and second circuit paths extending between said input terminal and said output terminal; first and second operational amplifiers respectively connected in said first and second circuit paths, each of said first and second operational amplifiers having a summing junction and an input capacitor connected to said summing junction; a feedback capacitor; and switching means for coupling to a reference voltage in an alternate manner one or the other input capacitor of said first and second amplifiers, for coupling said output terminal in an alternate manner to one or an other output of said first and second amplifiers, and for coupling said feedback capacitor in an alternate manner between the output and the summing junction of one or the other of said first and second amplifiers, respectively, so as to charge the input capacitor of said first and second amplifiers, respectively, to an error voltage in an alternate manner.
Claim 3
Dependent Claim 44 words
The continuous mode auto-zero offset amplifier as recited in claim 1 wherein said switching means includes: first and second switches for coupling said input terminal, respectively, to one or the other input capacitor of said first and second amplifiers, respectively, in an alternate manner.
Claim 4
Dependent Claim 87 words
The continuous mode auto-zero offset amplifier as recited in claim 2 wherein one side of said feedback capacitor is connected to said output terminal, said switching means further including: third and fourth switches for alternately coupling said output terminal, respectively, to one or the other of said outputs of said first and second amplifiers, respectively; and fifth and sixth switches for alternately coupling the other side of said feedback capacitor, respectively, to one or the other of said summing junctions of said first and second amplifiers, respectively.
Claim 5
Dependent Claim 94 words
The continuous mode auto-zero offset amplifier as recited in claim 3 wherein said switching means further comprises: seventh and eighth switches for alternately coupling said reference voltage to one or the other input capacitor, respectively, of said first and second amplifiers, respectively, when said one or the other input capacitor is disconnected from said input terminal; and ninth and tenth switches for alternately connecting the output of either of said first and second amplifiers disconnected from said output terminal to the summing junction of said either of said first and second operational amplifiers, respectively.
Claim 6
Dependent Claim 30 words
The continuous mode auto-zero offset amplifier as recited in claim 1 wherein said operational amplifiers are fabricated on a common integrated circuit chip with said capacitors and said switching means.
Claim 7
Dependent Claim 165 words
A continuous mode auto-zero offset integrator having an input terminal and an output terminal, and first and second circuit paths extending between said input terminal and said output terminal said integrator comprising: first and second operational amplifier respectively connected on said first and second circuit paths each of said operational amplifiers having a summing junction and an input capacitor connected to said summing junction, respectively; a feedback capacitor; and switching means for coupling to a reference voltage in an alternate manner one or the other input capacitor of said second and first amplifiers, for coupling said output terminal in an alternate manner to one or an other output of said first and second amplifiers, and for coupling said feedback capacitor in an alternate manner between the output and the summing junction of one or the other of said first and second amplifiers, respectively, so as to charge the input capacitor of said first and second amplifiers, respectively, to an error voltage in an alternate manner.
Claim 8
Dependent Claim 165 words
A continuous mode auto-zero offset integrator having an input terminal and an output terminal, and first and second circuit paths extending between said input terminal and said output terminal said integrator comprising: first and second operational amplifier respectively connected on said first and second circuit paths each of said operational amplifiers having a summing junction and an input capacitor connected to said summing junction, respectively; a feedback capacitor; and switching means for coupling to a reference voltage in an alternate manner one or the other input capacitor of said second and first amplifiers, for coupling said output terminal in an alternate manner to one or an other output of said first and second amplifiers, and for coupling said feedback capacitor in an alternate manner between the output and the summing junction of one or the other of said first and second amplifiers, respectively, so as to charge the input capacitor of said first and second amplifiers, respectively, to an error voltage in an alternate manner.
Claim 9
Dependent Claim 44 words
The continuous mode auto-zero offset integrator as recited in claim 6 wherein said switching means includes: first and second switches for coupling said input terminal, respectively, to one or the other input capacitor of said first and second amplifiers, respectively, in an alternate manner.
Claim 10
Dependent Claim 87 words
The continuous mode auto-zero offset integrator as recited in claim 7 wherein one side of said feedback capacitor is connected to said output terminal, said switching means further including: third and fourth switches for alternately coupling said output terminal, respectively, to one or the other of said outputs of said first and second amplifiers, respectively; and fifth and sixth switches for alternately coupling the other side of said feedback capacitor, respectively, to one or the other of said summing junctions of said first and second amplifiers, respectively.
Claim 11
Dependent Claim 91 words
The continuous mode auto-zero offset integrator as recited in claim 8 wherein said switching means further comprises: seventh and eighth switches for alternately coupling said reference voltage to one or the other input capacitor, respectively, of said first and second amplifiers, respectively, when said one or the other input capacitor is disconnected from said input terminal; and ninth and tenth switches for alternately connecting the output of either of said first and second amplifiers disconnected from said output terminal to the summing junction of said either of said operational amplifiers, respectively.
Claim 12
Dependent Claim 30 words
The continuous mode auto-zero offset integrator as recited in claim 6 wherein said operational amplifiers are fabricated on a common integrated circuit chip with said capacitors and said switching means.

References Cited (Backward Citations)

US4190805A Cited
US4697152A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-02-28 1992-08-29 1993-02-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-02-28 1996-08-29 1997-02-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-02-28 2000-08-29 2001-02-28 $7700.00 Window Closed / Lapsed

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