Patent US4804928A successfully refreshed from Google Patents.
US4804928A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Phase-frequency compare circuit for phase lock loop
Assignee: Steel Excel Inc
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Filing: 1987-05-12
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Granted: 1989-02-14
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Expires: 2007-05-12
Abstract
Abstract A phase-locked loop circuit having a charge pump and a voltage controlled oscillator which includes a phase/frequency comparator having a single circuit for operating in phase or frequency modes and which uses the discharge signal from the oscillator flip flop to trigger resetting of the input flip flop and which uses a one-shot in the phase compare mode for high frequency operation.
Inventors
- 👤 James E. Chloupek
- 👤 Richard E. Boucher
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 21:09
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085; H03L7/089; H03L7/0891
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
346 words
A phase/frequency compare circuit for use in a phase locked loop circuit having a charge pump and a voltage controlled oscillator, comprising: an input flip flop having a clock input coupled to an input signal source and a data input coupled to a high level voltage source; an oscillator flip flop having a clock input coupled to an output of the voltage controlled oscillator; a frequency/phase selector having complementary frequency and phase outputs for placing said phase/frequency compare circuit in a frequency or phase compare mode, respectively; a switch gate having an output coupled to a data input of said oscillator flip flop, a phase input coupled to an output of said input flip flop and a frequency input coupled to the frequency output of said frequency/phase selector wherein the switch gate output is high when either in the frequency mode or, if in the phase mode, following the arrival of an input signal to said input flip flop; charge logic gates having inputs coupled to the output of said input flip flop, to the frequency and phase outputs of said selector and to an output of said oscillator flip flop and an output coupled to a charge input of said charge pump operative to apply a charge signal to the charge input in response to an input signal setting said input flip flop when the frequency output of said selector is high and, if the oscillator flip flop is reset, when the phase output of said selector is high; a discharge gate having an input coupled to an output of said oscillator flip flop and an output coupled to a discharge input of said charge pump for generating a discharge control signal in response to the arrival of an oscillator signal provided, when the phase output of said selector is high, there has been a previous input signal; and reset circuitry coupled to said input and oscillator flip flops and operative to reset them in response to predetermined conditions of said selector outputs, said input and oscillator flip flop outputs and said oscillator signal level.
Claim 2
Dependent Claim
346 words
A phase/frequency compare circuit for use in a phase locked loop circuit having a charge pump and a voltage controlled oscillator, comprising: an input flip flop having a clock input coupled to an input signal source and a data input coupled to a high level voltage source; an oscillator flip flop having a clock input coupled to an output of the voltage controlled oscillator; a frequency/phase selector having complementary frequency and phase outputs for placing said phase/frequency compare circuit in a frequency or phase compare mode, respectively; a switch gate having an output coupled to a data input of said oscillator flip flop, a phase input coupled to an output of said input flip flop and a frequency input coupled to the frequency output of said frequency/phase selector wherein the switch gate output is high when either in the frequency mode or, if in the phase mode, following the arrival of an input signal to said input flip flop; charge logic gates having inputs coupled to the output of said input flip flop, to the frequency and phase outputs of said selector and to an output of said oscillator flip flop and an output coupled to a charge input of said charge pump operative to apply a charge signal to the charge input in response to an input signal setting said input flip flop when the frequency output of said selector is high and, if the oscillator flip flop is reset, when the phase output of said selector is high; a discharge gate having an input coupled to an output of said oscillator flip flop and an output coupled to a discharge input of said charge pump for generating a discharge control signal in response to the arrival of an oscillator signal provided, when the phase output of said selector is high, there has been a previous input signal; and reset circuitry coupled to said input and oscillator flip flops and operative to reset them in response to predetermined conditions of said selector outputs, said input and oscillator flip flop outputs and said oscillator signal level.
Claim 3
Dependent Claim
65 words
A phase/frequency compare circuit according to claim 1, wherein said reset circuitry includes a frequency reset one shot multivibrator having inputs coupled to said frequency output, the input of said discharge gate and to said input flip flop output and operative to reset said input and oscillator flip flops when in the frequency mode and in response to the setting of said oscillator flip flop.
Claim 4
Dependent Claim
68 words
A phase/frequency compare circuit according to claim 1, wherein said reset circuitry includes a phase one-shot multivibrator having an output coupled to said input flip flop and inputs coupled to complementary outputs of said oscillator flip flop and to said selector phase output and operative to reset said input flip flop when in a phase mode in response to the initiation of setting of said oscillator flip flop.
Claim 5
Dependent Claim
70 words
A phase/frequency compare circuit according to claim 1, wherein said reset circuitry includes a gate having an output coupled to said oscillator flip flop and inputs coupled to said oscillator output, said selector frequency output and to a complementary output of said oscillator flip flop and operative to reset said oscillator flip flop when in the phase mode in response to arrival of the second half of an oscillator signal.
Claim 6
Dependent Claim
87 words
A phase/frequency compare circuit according to claim 1, wherein said charge logic gates include a frequency AND gate having inputs coupled to said selector frequency output and to said input flip flop output and a phase AND gate having inputs coupled to said selector phase output, said oscillator flip flop output and to said input flip flop output and a NOR gate having inputs coupled to the outputs of said frequency and phase AND gates and an output coupled to a charge input of said charge pump.
Claim 7
Dependent Claim
15 words
A phase/frequency compare circuit according to claim 1, wherein said selector is a flip flop.
Claim 8
Dependent Claim
16 words
A phase/frequency compare circuit according to claim 1, wherein said switch gate is an OR gate.
Claim 9
Dependent Claim
231 words
A phase/frequency compare circuit for use in a phase locked loop circuit having a charge pump and a voltage controlled oscillator, comprising: an input flip flop having a clock input coupled to an input signal line; an oscillator flip flop having a clock input coupled to an output of said oscillator; a frequency/phase selector flip flop having complementary frequency and phase outputs for placing said circuit in a frequency and phase mode, respectively; means for selectively applying an output of said input flip flop during a phase mode and selector frequency output during a frequency mode to a data input of said flip-flop; means for generating a charge control signal for a charge input of said charge pump in response to an output signal from said input flip flop and, in the phase mode, only when said oscillator flip flop is reset; a discharge gate having an input coupled to an output of said oscillator flip flop and an output coupled to a discharge input of said charge pump for generating a discharge control signal in response to setting of said oscillator flip flop; and reset means for resetting said input and oscillator flip flops in response to setting of said oscillator flip flop except in a phase mode in which said reset means resets said oscillator flip flop in response to arrival of a second half of said oscillator signal.
Claim 10
Dependent Claim
231 words
A phase/frequency compare circuit for use in a phase locked loop circuit having a charge pump and a voltage controlled oscillator, comprising: an input flip flop having a clock input coupled to an input signal line; an oscillator flip flop having a clock input coupled to an output of said oscillator; a frequency/phase selector flip flop having complementary frequency and phase outputs for placing said circuit in a frequency and phase mode, respectively; means for selectively applying an output of said input flip flop during a phase mode and selector frequency output during a frequency mode to a data input of said flip-flop; means for generating a charge control signal for a charge input of said charge pump in response to an output signal from said input flip flop and, in the phase mode, only when said oscillator flip flop is reset; a discharge gate having an input coupled to an output of said oscillator flip flop and an output coupled to a discharge input of said charge pump for generating a discharge control signal in response to setting of said oscillator flip flop; and reset means for resetting said input and oscillator flip flops in response to setting of said oscillator flip flop except in a phase mode in which said reset means resets said oscillator flip flop in response to arrival of a second half of said oscillator signal.
Claim 11
Dependent Claim
65 words
A phase/frequency compare circuit according to claim 8, wherein said reset means includes a frequency reset one shot multivibrator having inputs coupled to said frequency output, the input of said discharge gate and to said input flip flop output and operative to reset said input and oscillator flip flops when in the frequency mode and in response to the setting of said oscillator flip flop.
Claim 12
Dependent Claim
71 words
A phase/frequency compare circuit according to claim 8, wherein said reset, means circuitry includes a phase one-shot multivibrator having an output coupled to said input flip flop and inputs coupled to complementary outputs of said oscillator flip flop and coupled to said selector flip flop output and operative to reset said input flip flop when in a phase mode in response to the initiation of setting of said oscillator flip flop.
Claim 13
Dependent Claim
70 words
A phase/frequency compare circuit according to claim 8, wherein said reset means includes a gate having an output coupled to said oscillator flip flop and inputs coupled to said oscillator output, said selector frequency output and to a complementary output of said oscillator flip flop and operative to reset said oscillator flip flop when in the phase mode in response to arrival of the second half of a oscillator signal.
Claim 14
Dependent Claim
87 words
A phase/frequency compare circuit according to claim 8, wherein said charge generating means includes a frequency AND gate having inputs coupled to said selector frequency output and to said input flip flop output and a phase AND gate having inputs coupled to said selector phase output, said oscillator flip flop output and to said input flip flop output and a NOR gate having inputs coupled to the outputs of said frequency and phase AND gates and an output coupled to a charge input of said charge pump.
Claim 15
Dependent Claim
15 words
A phase/frequency compare circuit according to claim 8, wherein said selector is a flip flop.
Claim 16
Dependent Claim
16 words
A phase/frequency compare circuit according to claim 8, wherein said switch gate is an OR gate.
References Cited (Backward Citations)
US4594563A
Cited
US4593254A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-02-14 | 1992-08-15 | 1993-02-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-02-14 | 1996-08-15 | 1997-02-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-02-14 | 2000-08-15 | 2001-02-14 | $7700.00 | Window Closed / Lapsed |