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US4804925A Expired / Lapsed US ⏱️ 0.0 years remaining

DPSK exclusive-OR demodulator

Assignee: Fujifilm Corp
•
Filing: 1987-03-23
•
Granted: 1989-02-14
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Expires: 2007-03-23
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Abstract

Abstract A data signal is modulated by an exclusive-OR operation applied to a carrier signal and a data signal to be recorded. Demodulation is similarly performed by an exclusive-OR operation applied to the carrier signal and signal indicative of read data. This makes it possible to construct the modulating/demodulating circuit in the form of a digital circuit.

Inventors

  • 👤 Yoshiki Iwase
  • 👤 Katsuo Nakadai
  • 👤 Izumi Miyake
  • 👤 Kiyotaka Kaneko
  • 👤 Kazuya Oda

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 09:16
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/79; H04N9/80; H04N9/82; H04N9/8205; H04N9/8211; H04N9/8222; G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; G11B20/1407; G11B20/1419; H04N9/8233

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 107 words
A DPSK demodulating circuit comprising: a carrier signal generating circuit for generating a carrier signal for DPSK demodulation, and an exclusive-OR circuit to which are imputted a signal modulated by data and said carrier signal, said carrier signal generating circuit including: an edge sampling circuit for extracting both a leading and trailing edge of the modulated signal; a converting circuit for converting an output pulse signal from said edge sampling circuit into a rectangular signal having the same period of the output pulse signal and a duty factor of one-half; and a frequency dividing circuit for doubling the period of an output signal from said converting circuit.
Claim 2
Dependent Claim 107 words
A DPSK demodulating circuit comprising: a carrier signal generating circuit for generating a carrier signal for DPSK demodulation, and an exclusive-OR circuit to which are imputted a signal modulated by data and said carrier signal, said carrier signal generating circuit including: an edge sampling circuit for extracting both a leading and trailing edge of the modulated signal; a converting circuit for converting an output pulse signal from said edge sampling circuit into a rectangular signal having the same period of the output pulse signal and a duty factor of one-half; and a frequency dividing circuit for doubling the period of an output signal from said converting circuit.

References Cited (Backward Citations)

US3525945A Cited
US3970945A Cited
US4052558A Cited
US4344175A Cited
US4577241A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-02-14 1992-08-15 1993-02-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-02-14 1996-08-15 1997-02-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-02-14 2000-08-15 2001-02-14 $7700.00 Window Closed / Lapsed

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