US3970945A
Expired / Lapsed
US
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Method and apparatus for demodulating PSK modulated oscillations
Assignee: Telefunken Radio Communication Systems GmbH and Co KG
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Filing: 1974-10-29
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Granted: 1976-07-20
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Expires: 1994-10-29
Abstract
Abstract A method and apparatus for demodulating an input signal modulated according to the phase shift keying (PSK) modulation method wherein the modulated input signal is combined with a reference voltage of the same frequency which is leading in phase by one-quarter of the period duration of the input signal, the resulting output signal is delayed in time by one-half of the period duration of the input signal and is combined with an identical but undelayed signal to provide a control voltage, and the control voltage is utilized for setting the phase of a further reference voltage which is then combined with the input signal to produce the demodulated output voltage.
Inventors
- 👤 Siegbert Knapp
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 09:32
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/227; H04L27/2271; H04L27/2273; H04L27/0014; H04L2027/0044; H04L2027/0053; H04L2027/0055
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
152 words
A method of demodulating an input signal modulated according to the phase shift keying method comprising the steps of: a. combining the input signal with a first reference signal of the same frequency as said input signal but which leads the input signal in phase by one-quarter of the period duration of said input signal; b. delaying the output signal from said step (a) in time by one-half of the period duration of said input signal; c. combining the undelayed output signal from said step (a) with the delayed output signal from step (b) to produce a control voltage; d. controlling the phase of an oscillator with said control voltage to set the phase of said first reference signal and of a second reference signal of the same phase and frequency as said input signal; and e. combining said second reference signal with said input signal to produce the demodulated output voltage.
Claim 2
Independent Claim
152 words
A method of demodulating an input signal modulated according to the phase shift keying method comprising the steps of: a. combining the input signal with a first reference signal of the same frequency as said input signal but which leads the input signal in phase by one-quarter of the period duration of said input signal; b. delaying the output signal from said step (a) in time by one-half of the period duration of said input signal; c. combining the undelayed output signal from said step (a) with the delayed output signal from step (b) to produce a control voltage; d. controlling the phase of an oscillator with said control voltage to set the phase of said first reference signal and of a second reference signal of the same phase and frequency as said input signal; and e. combining said second reference signal with said input signal to produce the demodulated output voltage.
Claim 3
Dependent Claim
308 words
A circuit arrangement for demodulating a digitalized input signal which is modulated according to the phase shift keying modulation method comprising in combination: a signal input terminal; a first exclusive-OR circuit having a first input connected to said signal input terminal, a second input and an output; a delay line having a delay time equal to one-half of the period duration of said input signal, the input of said delay line being connected to said output of said first exclusive-OR circuit; a second exclusive-OR circuit having a first input directly connected to said output of said first exclusive-OR circuit and a second input connected to the output of said delay line; a control filter means connected to the output of said second exclusive-OR circuit for providing a control voltage output signal; a phase controllable oscillator means, having its control input connected to the output of said control filter, for providing an output signal whose frequency is n times the frequency of said input signal; a frequency processor means connected to the output of said oscillator means for dividing the frequency of the output signal from said oscillator to provide a first reference signal at a first output which is of the same frequency and is substantially in phase with said input signal and a second reference signal at a second output thereof which is of the same frequency as said first reference signal but leads same by one-quarter of the period duration of said input signal, said second output of said frequency processor means being connected to said second input of said first exclusive-OR circuit; and a third exclusive-OR circuit having one input connected to said signal input terminal and its other input connected to said first output of said frequency processor means, the output of said third exclusive-OR circuit constituting the output of said demodulating circuit arrangement.
Claim 4
Dependent Claim
308 words
A circuit arrangement for demodulating a digitalized input signal which is modulated according to the phase shift keying modulation method comprising in combination: a signal input terminal; a first exclusive-OR circuit having a first input connected to said signal input terminal, a second input and an output; a delay line having a delay time equal to one-half of the period duration of said input signal, the input of said delay line being connected to said output of said first exclusive-OR circuit; a second exclusive-OR circuit having a first input directly connected to said output of said first exclusive-OR circuit and a second input connected to the output of said delay line; a control filter means connected to the output of said second exclusive-OR circuit for providing a control voltage output signal; a phase controllable oscillator means, having its control input connected to the output of said control filter, for providing an output signal whose frequency is n times the frequency of said input signal; a frequency processor means connected to the output of said oscillator means for dividing the frequency of the output signal from said oscillator to provide a first reference signal at a first output which is of the same frequency and is substantially in phase with said input signal and a second reference signal at a second output thereof which is of the same frequency as said first reference signal but leads same by one-quarter of the period duration of said input signal, said second output of said frequency processor means being connected to said second input of said first exclusive-OR circuit; and a third exclusive-OR circuit having one input connected to said signal input terminal and its other input connected to said first output of said frequency processor means, the output of said third exclusive-OR circuit constituting the output of said demodulating circuit arrangement.
Claim 5
Dependent Claim
34 words
A circuit arrangement as defined in claim 2 wherein said delay line is a clock pulse controlled shift register whose clock pulse input is connected to a further output of said frequency processor means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-07-20 | 1980-01-19 | 1980-07-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-07-20 | 1984-01-19 | 1984-07-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-07-20 | 1988-01-19 | 1988-07-20 | $7700.00 | Window Closed / Lapsed |