US4803615A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Microcode control of a parallel architecture microprocessor
Assignee: International Business Machines Corp
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Filing: 1987-06-08
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Granted: 1989-02-07
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Expires: 2007-06-08
Abstract
Abstract A microprogrammed parallel processor including a plurality of subprocessors operates under the control of microinstructions. Each microinstruction contains a plurality of micro-operations each of which requires one or more subprocessors for execution. All micro-operations for which required subprocessors are available are immediately carried out. Any remaining micro-operations within a microinstruction which are not executed due to lack of subprocessor availability are recycled. These remaining micro-operations are executed in subsequent cycles as a required subprocessor becomes available. The entire microinstruction is not recycled but only those portions of it, i.e., the unexecuted micro-operations, are recycled and executed in a subsequent cycle. The microinstruction being executed is stored in a latch until all micro-operations within the microinstruction are executed. At that time, the next microinstruction is fetched into the latch.
Inventors
- 👤 William M. Johnson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 04:04
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3861; G06F9/22; G06F9/26; G06F9/262; G06F9/264; G06F9/268; G06F9/28; G06F9/3836; G06F9/3853
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
136 words
A microprogrammed parallel processor including a plurality of processing units, operable under control of microinstructions each containing a plurality of micro-operations, said microprogrammed parallel processor comprising: means for executing, during a cycle, each of said plurality of micro-operations, within a microinstruction, for which a required processing unit is available; means connected to said executing means for indicating which micro-operations were not executed during the cycle; means, connected to said executing means and said indicating means for recycling only those micro-operations within said microinstruction for which said indicating means indicated as not executed during the cycle, for execution by said executing means in a subsequent cycle as each required processing unit becomes available; and means, connected to said means for recycling, for storing said microinstruction until all of said plurality of micro-operations within said microinstruction are executed.
Claim 2
Dependent Claim
136 words
A microprogrammed parallel processor including a plurality of processing units, operable under control of microinstructions each containing a plurality of micro-operations, said microprogrammed parallel processor comprising: means for executing, during a cycle, each of said plurality of micro-operations, within a microinstruction, for which a required processing unit is available; means connected to said executing means for indicating which micro-operations were not executed during the cycle; means, connected to said executing means and said indicating means for recycling only those micro-operations within said microinstruction for which said indicating means indicated as not executed during the cycle, for execution by said executing means in a subsequent cycle as each required processing unit becomes available; and means, connected to said means for recycling, for storing said microinstruction until all of said plurality of micro-operations within said microinstruction are executed.
Claim 3
Dependent Claim
105 words
A microprogrammed parallel processor according to claim 1 wherein said means for recycling further comprises: decoding means connected between said storing means and said plurality of processing units for checking the availability of each processing unit required by a micro-operation; and, sequencing means, operatively connected between said plurality of processing units and said storing means, for controlling the sequencing of micro-operations within said microinstruction in said storing means, said sequencing means enabling the execution of a micro-operation subsequent to the availability of a required processing unit, said sequencing means further initiating the recycling of a micro-operation subsequent to the unavailability of a required processing unit.
Claim 4
Dependent Claim
37 words
A microprogrammed parallel processor according to claim 1 further comprising means, connected to said storing means, for fetching a next microinstruction to said storing means following execution of all of said plurality of micro-operations within said microinstruction.
Claim 5
Dependent Claim
44 words
A microprogrammed parallel processor according to claim 2 wherein said sequencing means further comprises means, operatively connected between said plurality of processing units and said storing means, for signalling said storing means that a micro-operation has been executed, whereby said micro-operation is not recycled.
Claim 6
Independent Claim
115 words
A method for controlling a microprogrammed parallel processor having a plurality of processing units operable under the control of microinstructions, each of said microinstructions including at least two micro-operations requiring the availability of at least one of said plurality of processing units, said method comprising: executing a micro-operation in a microinstruction for which a required processing unit is available during a cycle; indicating which micro-operations were not executed during said cycle; recycling only those micro-operations within said microinstruction indicated as not executed during the cycle; executing each indicated micro-operation in said microinstruction as its corresponding required processing unit becomes available; and recycling all remaining micro-operations in said microinstruction until all required processing units become available.
Claim 7
Independent Claim
115 words
A method for controlling a microprogrammed parallel processor having a plurality of processing units operable under the control of microinstructions, each of said microinstructions including at least two micro-operations requiring the availability of at least one of said plurality of processing units, said method comprising: executing a micro-operation in a microinstruction for which a required processing unit is available during a cycle; indicating which micro-operations were not executed during said cycle; recycling only those micro-operations within said microinstruction indicated as not executed during the cycle; executing each indicated micro-operation in said microinstruction as its corresponding required processing unit becomes available; and recycling all remaining micro-operations in said microinstruction until all required processing units become available.
Claim 8
Dependent Claim
23 words
A method according to claim 5 further comprising fetching a next microinstruction for execution subsequent to all micro-operations in said microinstruction being executed.
References Cited (Backward Citations)
US4558411A
Cited
US4001788A
Cited
US4179731A
Cited
US4199811A
Cited
US4179737A
Cited
US4571673A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-02-07 | 1992-08-08 | 1993-02-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-02-07 | 1996-08-08 | 1997-02-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-02-07 | 2000-08-08 | 2001-02-07 | $7700.00 | Window Closed / Lapsed |