US4803441A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Amplifying circuit
Assignee: Yamaha Corp
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Filing: 1987-03-10
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Granted: 1989-02-07
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Expires: 2007-03-10
Abstract
Abstract An amplifying circuit comprises a voltage-current converter for voltage-current converting an input signal to be amplified and a current-current converter including a first transistor (NPN), a second transistor (NPN), a third transistor (PNP) and a fourth transistor (PNP). Emitters of the first and third transistors are connected to each other, collector and base of the second transistor are connected to each other, collector and base of the fourth transistor are connected to each other, emitters of the second and fourth transistors are connected to each other, bases of the first and second transistors are connected to each other and bases of the third and fourth transistors are connected to each other. Output current of the voltage-current converter is supplied to the emitters of the first and third transistors and a constant current is supplied to the second and fourth transistors. The amplifying circuit further comprises an output circuit which synthesizes and outputs collector currents of the first and third transistors after amplifying these collector currents and a circuit for negative-feeding back an output of the output circuit to the voltage-current converter. An amplifying circuit with reduced idling current and an expended range of class-A operation is provided.
Inventors
- 👤 Masao Noro
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 09:23
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/30; H03F3/3066; H03F1/00; H03F1/32; H03F1/3217
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
428 words
An amplifying circuit comprising: a voltage-current conversion circuit for voltage-current converting an input signal to be amplified; a current-current conversion circuit comprising a first transistor, a second transistor, a third transistor and a fourth transistor, emitters of said first and third transistors being connected to each other, collector and base of said second transistor being connected to each other, collector and base of said fourth transistor being connected to each other, emitters of said second and fourth transistors being connected to each other, bases of said first and second transistors being connected to each other, bases of said third and fourth transistors being connected to each other, output current of said voltage-current conversion circuit being supplied to the emitters of said first and third transistors and a constant current being supplied to said second and fourth transistors; an output circuit for synthesizing and outputting collector currents of said first and third transistors after amplifying these collector currents, wherein said output circuit comprises (a) a first current mirror circuit for providing a first output current which is a predetermined multiple of an output current of the first transistor, said first current mirror circuit including first control means having first and second resistors whose resistance ratio determines the predetermined multiple, (b) a second current mirror circuit for providing a second output current which is a predetermined multiple of an output current of the third transistor, said second current mirror circuit including second control means having third and fourth resistors whose resistance ratio determines the predetermined multiple for the second current mirror circuit, and (c) means for combining the first and second output currents to produce a composite output; and a circuit for negative-feeding back an output of said output circuit to said voltage-current conversion circuit; wherein (a) the first current mirror circuit includes a first output transistor, a first differential amplifier driving a base of the first output transistor and having a first input coupled to one terminal of the first resistor and the collector of the first transistor and a second input coupled to one terminal of the second resistor, the other terminals of the resistors being connected to a supply voltage, and (b) the second current mirror circuit comprises a second output transistor, a second differential amplifier driving base of the second output transistor and having a first input coupled to one terminal of the third resistor and the collector of the third transistor and a second input coupled to one terminal of the fourth resistor, the other terminals of the resistors being connected to a supply voltage.
Claim 2
Dependent Claim
428 words
An amplifying circuit comprising: a voltage-current conversion circuit for voltage-current converting an input signal to be amplified; a current-current conversion circuit comprising a first transistor, a second transistor, a third transistor and a fourth transistor, emitters of said first and third transistors being connected to each other, collector and base of said second transistor being connected to each other, collector and base of said fourth transistor being connected to each other, emitters of said second and fourth transistors being connected to each other, bases of said first and second transistors being connected to each other, bases of said third and fourth transistors being connected to each other, output current of said voltage-current conversion circuit being supplied to the emitters of said first and third transistors and a constant current being supplied to said second and fourth transistors; an output circuit for synthesizing and outputting collector currents of said first and third transistors after amplifying these collector currents, wherein said output circuit comprises (a) a first current mirror circuit for providing a first output current which is a predetermined multiple of an output current of the first transistor, said first current mirror circuit including first control means having first and second resistors whose resistance ratio determines the predetermined multiple, (b) a second current mirror circuit for providing a second output current which is a predetermined multiple of an output current of the third transistor, said second current mirror circuit including second control means having third and fourth resistors whose resistance ratio determines the predetermined multiple for the second current mirror circuit, and (c) means for combining the first and second output currents to produce a composite output; and a circuit for negative-feeding back an output of said output circuit to said voltage-current conversion circuit; wherein (a) the first current mirror circuit includes a first output transistor, a first differential amplifier driving a base of the first output transistor and having a first input coupled to one terminal of the first resistor and the collector of the first transistor and a second input coupled to one terminal of the second resistor, the other terminals of the resistors being connected to a supply voltage, and (b) the second current mirror circuit comprises a second output transistor, a second differential amplifier driving base of the second output transistor and having a first input coupled to one terminal of the third resistor and the collector of the third transistor and a second input coupled to one terminal of the fourth resistor, the other terminals of the resistors being connected to a supply voltage.
Claim 3
Dependent Claim
32 words
An amplifying circuit as defined in claim 1 wherein a point at which the emitters of said second and fourth transistors are connected to each other is connected to a certain potential.
Claim 4
Dependent Claim
32 words
An amplifying circuit as defined in claim 2 wherein current supplied to the emitters of said first and third transistors is a sum of collector currents of said first and third transistors.
Claim 5
Dependent Claim
34 words
An amplifying circuit as defined in claim 3 wherein values of the constant current supplied to said second and fourth transistors are equal to each other and set to a value other than zero.
Claim 6
Dependent Claim
25 words
An amplifying circuit as in claim 1 wherein the ratios of the first and second resistors and the third and fourth resistors are the same.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-02-07 | 1992-08-08 | 1993-02-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-02-07 | 1996-08-08 | 1997-02-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-02-07 | 2000-08-08 | 2001-02-07 | $7700.00 | Window Closed / Lapsed |