Patterning optical and X-ray masks for integrated circuit fabrication

Claim 1

A method of lithographic patterning of integrated circuit chip process mask plates and mask membranes comprising the steps of: applying a thin layer of metal over a mask substrate; covering the layer of metal with a layer of positive electron resist; delineating the peripheral boundaries of the desired mask geometry using a direct-write spot electron beam; said electron beam serving to expose the resist in the peripheral boundaries delineated by said electron beam; developing and etching the mask substrate to remove the positive resist and the underlying metal in the exposed peripheral boundaries; raster scanning the mask substrate with a low exposure-level intensity beam until a peripheral boundary is detected, the detection then serving to increase the beam intensity six or more times so as to expose the high intensity raster scanned positive resist; said scanning and high intensity exposure continuing until the mating peripheral boundary is detected, the latter detection then serving to rapidly decrease the beam intensity to its former low exposure-level intensity; developing the substrate to remove the positive resist subjected to the increased exposure-level beam intensity; etching away the metal underlying the positive resist that was subject to said exposure-level beam intensity; and removing the remaining positive electron resist covering the substrate area outside of the geometry(s) circumscribed or delineated by said peripheral boundaries, said detection having an intrinsic delay so that the increase and decrease in beam intensity occurs a short predetermined time after a boundary has been encountered.

Claim 2

A method of lithographic patterning of integrated circuit chip process mask plates and mask membranes comprising the steps of: applying a thin layer of metal over a mask substrate; covering the layer of metal with a layer of positive electron resist; delineating the peripheral boundaries of the desired mask geometry using a direct-write spot electron beam; said electron beam serving to expose the resist in the peripheral boundaries delineated by said electron beam; developing and etching the mask substrate to remove the positive resist and the underlying metal in the exposed peripheral boundaries; raster scanning the mask substrate with a low exposure-level intensity beam until a peripheral boundary is detected, the detection then serving to increase the beam intensity six or more times so as to expose the high intensity raster scanned positive resist; said scanning and high intensity exposure continuing until the mating peripheral boundary is detected, the latter detection then serving to rapidly decrease the beam intensity to its former low exposure-level intensity; developing the substrate to remove the positive resist subjected to the increased exposure-level beam intensity; etching away the metal underlying the positive resist that was subject to said exposure-level beam intensity; and removing the remaining positive electron resist covering the substrate area outside of the geometry(s) circumscribed or delineated by said peripheral boundaries, said detection having an intrinsic delay so that the increase and decrease in beam intensity occurs a short predetermined time after a boundary has been encountered.