Broadband space switching network and parallel-series converter and series-parallel converter for use in such a space switching network

Claim 2

A broadband space switching network comprising a plurality of input lines, a plurality of output lines intersecting the input lines and a plurality of cross-point switches provided on each intersection of an input and an output line, the switches having a control input coupled to a cross-point control for selectively through-connected an input line to an output line, characterized in that a bit stream on the input lines and on the output lines is organized in nbit words, that each work contains n 1 (n 1 <n) information bits and (n-n 1 ) idle bits, that the cross-point switches always switch through the n 1 information bit word from an input line to an output line and that the cross-point switches are adjusted by the cross point control in the period in whcih the (n-n 1 ) idle bits are present on the input line.

Claim 3

A space switching network in claim 1, further including a parallel-series converter (PST) associated with each different one of said input lines, each converter (PST) having n 1 inputs and a single output connected to its respective associated input line, each parallel-series converter (PST) comprising a first register (REG 1 ) and a second register (REG 2 ) each having n sections, and a number (n 1 ) of change-over switches (SW 1 , ,. . . , SW 9 ), and an input of each switch (SW 1 ,,. . . SW 9 ) being connected to an input of the parallel-series converter, and a first change-over contact of each switch (SW) being connected to an input of n 1 sections of the first register (REG 1 ) and a second change-over contact of each switch being connected to an input of n 1 sections of the second register (REG 2 ) for alternately entering information into the first and second registers, and an output (REGO 1 ) of the first register (REG 1 ) being connected to a first change-over contact of an output switch (SWO) and an output (REGO 2 ) of the second register (REG 2 ) being connected to a second change-over contact of the output switch, the output switch (SWO) having a single output that constitutes the single output of said converter, and a control input of the two registers being coupled to a clock generator (CL) for alternately serially reaidng out the contents of the n sections of the second and first registers , via said output switch (SWO) to said single output of said converter.

Claim 4

A space switching network as in claim 1, further including a series-parallel converter (SPT) associated with each different one of said output lines, each converter (SPT) having a single input connected to its respective associated output line and n 1 , outputs, each converter (SPT) comprising a first register (REG 3 ) and a second register (REG 4 ) each having n sections, and a number (n 1 ) of change-over switches (SW 1 , . . . SW 9 ), and an output of each switch (SW 1 , . . . SW 9 ) being connected to an output of the series-parallel converter, and a first change-over contact of each switch (SW) being connected to an output of the n 1 sections of the first register (REG 3 ) and a second change-over contact of each switch being connected to an output of n 1 sections of the second register (REG 4 ) for alternately and in parallel reading out the contents of n 1 sections of the first (REG 3 ) and the second registers (REG 4 ), and an input of the first register (REG 3 ) being connected to a first change-over contact of an input switch (SWI) and an input of the second register (REG 4 ) being connected to a second change-over contact of said input switch (SWI) and a control input (WR) of the two registers being coupled to a clock generator (CL) for alternately and serially writing the first (REG 3 ) and the second registers (REG 4 ) each with n bits received fromm said output line via said input switch (SWI).