Distortion reduction circuit for video playback

Claim 2

Apparatus for removal of distortion from broadband signals reproduced from a magnetic tape record by a playback apparatus including a magnetic head signal pick-up means and a preamplifier for amplifying the output of said pick-up means, said distortion removal apparatus including: a first stage having an input connected to said preamplifier for compensatory removal of distortion of said signals which was caused by distortion of group propagation signal time of signal components passing through said pick-up means and said preamplifier, and for providing a first partially distortion-corrected signal at an output of said first stage; a second stage, having an input connected to said output of said first stage, for providing reduction of signal amplitude distortion and at the same time providing 90° phase rotation and for providing a second partially distortion-corrected signal at an output of said second stage, and a third stage, having an input connected to the output of said second stage, for compensation of high frequency signal amplitude with linear phase characteristic.

Claim 3

Apparatus according to claim 1, wherein said first stage comprises a differential amplifier having a non-inverting input connected to fixed potential and an inverting input galvanically connected to the output of said preamplifier through a circuit similating the input impedance of said preamplifier and having a feedback connection from the output of said differential amplifier to said inverting input thereof through an electrical network simulating the coupling impedance of the system composed of said pick-up means and said preamplifier, whereby said first stage has a phase characteristic with respect to frequency which is substantially the inverse of said phase characteristic with respect to frequency of said pickup and preamplifier system.

Claim 4

Apparatus according to claim 2, wherein said feedback connection of said differential amplifier (63) comprises a series circuit composed of, in series, a resistance representative of the loss resistance (R S ) of said pick-up means, an inductance (L H ) representative of the inductance of said pick-up means and a parallel circuit combination having in one parallel branch a resistance representing the input resistance (R i ) of said preamplifier and in the parallel branch a capacitance representative of the sum of the capacitance (C H ) of said pick-up means and the input capacitance (C i ) of said preamplifier.

Claim 5

Apparatus according to claim 2, wherein said feedback connection of said differential amplifier (73) comprises a series circuit composed of, in series, a first parallel circuit combination of a first resistance (R HP ) and a series combination, in shunt with said first resistance, of a second resistance (R HS ) said first parallel circuit combination being representative of the resistance and inductance of said pick-up means, and an inductance (L H ) and a second parallel circuit combination having in one parallel branch a resistance representing the input resistance (R i ) of said preamplifier and in the parallel branch a capacitance representative of the sum of the capacitance (C H ) of said pick-up means and the input capacitance (C i ) of said preamplifier.

Claim 6

Apparatus according to claim 1, wherein said first stage comprises a differential amplifier of the emitter-coupled type (81-88) wherein emitter coupling is provided by a resistance representative of the input resistance of said preamplifier and a capacitance (C i ) in parallel therewith which is representative of the input capacitance of said preamplifier and wherein an output transistor pair of emitter-coupled transistors has a collector load impedance composed of, in series, a first parallel circuit combination of a first resistance (R HP ) and a series combination, in shunt with said first resistance, of a second resistance (R HS ) said first parallel circuit combination being representative of the resistance and inductance of said pick-up means, and an inductance (L H ) and a second parallel circuit combination having in one parallel branch a resistance representing the input resistance (R i ) of said preamplifier and in the parallel branch a capacitance representative of the sum of the capacitance (C H ) of said pick-up means and the input capacitance (C i ) of said preamplifier and the input collector of said output transistor being connected to the control electrode of a second output transistor.

Claim 7

Apparatus according to claim 1, wherein said second stage comprises, connected between said input and said output of said second stage a parallel circuit combination of an inverting integrator and a non-inverting differentiator, the respective outputs of which are summed algebraically to provide said second partially distortion corrected signal at said output of said second stage.