US4788523A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Viad chip resistor
Assignee: Government of the United States of America
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Filing: 1987-12-10
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Granted: 1988-11-29
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Expires: 2007-12-10
Abstract
Abstract A viad chip resistor made from an insulative wafer and having a via formed near end of the wafer. Conductive pads surround the vias on both sides of the wafer. A resistive element is formed on one side of the wafer between the vias and is electrically connected to the conductive pads on that side. An array of viad chip resistors, from which said individual viad chip resistors are cut, is also shown.
Inventors
- 👤 William L. Robbins
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 00:08
CPC Classifications
H; H01; H01C; H01C17/00; H01C17/006; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49082; Y10T29/49099; Y10T29/49101; Y10T29/49789
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
138 words
An array of spaced electrical circuit components, comprising: (a) a substrate of electrically insulating material having first and second surfaces; (b) spaced apart rows of vias in said substrate, the rows having a pattern comprising single rows and double rows, the vias being inward from the edges of the substrate; (c) conductive material regions, each surrounding at least one via on said first and second surfaces of said substrate; (d) conductive material within said vias and electrically interconnecting the conductive material regions on the first and second surfaces surrounding those vias; and (e) resistor elements on a surface of said substrate, each resistor element electrically interconnecting two conductive material regions, a conductive material region being associated with a double row of said vias, no via in the substrate being used in conjunction with more than one resistor element.
Claim 2
Dependent Claim
138 words
An array of spaced electrical circuit components, comprising: (a) a substrate of electrically insulating material having first and second surfaces; (b) spaced apart rows of vias in said substrate, the rows having a pattern comprising single rows and double rows, the vias being inward from the edges of the substrate; (c) conductive material regions, each surrounding at least one via on said first and second surfaces of said substrate; (d) conductive material within said vias and electrically interconnecting the conductive material regions on the first and second surfaces surrounding those vias; and (e) resistor elements on a surface of said substrate, each resistor element electrically interconnecting two conductive material regions, a conductive material region being associated with a double row of said vias, no via in the substrate being used in conjunction with more than one resistor element.
Claim 3
Dependent Claim
95 words
An electrical circuit component, comprising: (a) a wafer of electrically insulating material having first and second surfaces, of a size for holding a single component; (b) two vias spaced inward from the edges of the wafer and spaced apart from each other; (c) terminal pads surrounding said vias, the terminal pads being on the first and second surfaces of said wafer; (d) conductive material within vias and being electrically interconnected to the terminal pads surrounding those vias; and (e) a resistor element on the uper surface of said wafer and electrically interconnecting said terminal pads.
Claim 4
Dependent Claim
95 words
An electrical circuit component, comprising: (a) a wafer of electrically insulating material having first and second surfaces, of a size for holding a single component; (b) two vias spaced inward from the edges of the wafer and spaced apart from each other; (c) terminal pads surrounding said vias, the terminal pads being on the first and second surfaces of said wafer; (d) conductive material within vias and being electrically interconnected to the terminal pads surrounding those vias; and (e) a resistor element on the uper surface of said wafer and electrically interconnecting said terminal pads.
Claim 5
Dependent Claim
147 words
An array of spaced electrical circuit components, comprising: (a) a substrate of electrically insulating material having first and second surfaces; (b) spaced apart rows of vias in said substrate, the rows alternately being more distantly spaced and more closely spaced, the rows having a pattern comprising single rows and double rows, the vias being inward of the edges of the substrate; (c) a conductive material strip surrounding each row of vias, such a strip being on each of said first and second surfaces of said substrate; (d) conductive material within said vias and electrically interconnecting the conductive material strips on said first and second surfaces surrounding those vias; and (e) resistor elements on a surface of said substrate, the resistor elements electrically interconnecting conductive material strips associated with more distantly spaced rows of vias, no via in the substrate being associated with more than one resistor element.
Claim 6
Dependent Claim
147 words
An array of spaced electrical circuit components, comprising: (a) a substrate of electrically insulating material having first and second surfaces; (b) spaced apart rows of vias in said substrate, the rows alternately being more distantly spaced and more closely spaced, the rows having a pattern comprising single rows and double rows, the vias being inward of the edges of the substrate; (c) a conductive material strip surrounding each row of vias, such a strip being on each of said first and second surfaces of said substrate; (d) conductive material within said vias and electrically interconnecting the conductive material strips on said first and second surfaces surrounding those vias; and (e) resistor elements on a surface of said substrate, the resistor elements electrically interconnecting conductive material strips associated with more distantly spaced rows of vias, no via in the substrate being associated with more than one resistor element.
Claim 7
Dependent Claim
119 words
An electrical circuit component, comprising: (a) a wafer of electrically insulating material having first and second surfaces, of a size for holding a single component; (b) two vias spaced inward from the edges of the wafer and spaced apart from each other; (c) terminal pads surrounding at least two vias, the terminal pads being on the first and second surfaces of said wafer, the pads being inward of ends of the wafer and extending to the sides of the wafer; (d) conductors within at least two vias and being electrically interconnected to the terminal pads surrounding those vias; and (e) a resistor element on a surface of said wafer and electrically interconnecting terminal pads surrounding at least two vias.
Claim 8
Dependent Claim
119 words
An electrical circuit component, comprising: (a) a wafer of electrically insulating material having first and second surfaces, of a size for holding a single component; (b) two vias spaced inward from the edges of the wafer and spaced apart from each other; (c) terminal pads surrounding at least two vias, the terminal pads being on the first and second surfaces of said wafer, the pads being inward of ends of the wafer and extending to the sides of the wafer; (d) conductors within at least two vias and being electrically interconnected to the terminal pads surrounding those vias; and (e) a resistor element on a surface of said wafer and electrically interconnecting terminal pads surrounding at least two vias.
Claim 9
Dependent Claim
177 words
An array of spaced electrical circuit components, comprising: (a) a substrate of electrically insulating material having first and second surfaces; (b) spaced apart rows of vias in said substrate, the rows alternately being more distantly spaced and more closely spaced, the rows having a pattern comprising single rows and double rows, the vias being inward of the edges of the substrate; (c) a conductive material strip surrounding each of two more distantly spaced rows of vias, such a strip being on each of said first and second surfaces of said substrate, the conductive strip also surrounding a next row of vias, such a strip being on each of said first and second surfaces of said substrate; (d) conductive material within said vias and electrically interconnecting the conductive material strips on said first and second surfafces surrounding those vias; and (e) resistor elements on a surface of said substrate, the resistor elements electrically interconnecting conductive material strips associated with more distantly spaced rows of vias, no via in the substrate being associated with more than one resistor element.
Claim 10
Dependent Claim
177 words
An array of spaced electrical circuit components, comprising: (a) a substrate of electrically insulating material having first and second surfaces; (b) spaced apart rows of vias in said substrate, the rows alternately being more distantly spaced and more closely spaced, the rows having a pattern comprising single rows and double rows, the vias being inward of the edges of the substrate; (c) a conductive material strip surrounding each of two more distantly spaced rows of vias, such a strip being on each of said first and second surfaces of said substrate, the conductive strip also surrounding a next row of vias, such a strip being on each of said first and second surfaces of said substrate; (d) conductive material within said vias and electrically interconnecting the conductive material strips on said first and second surfafces surrounding those vias; and (e) resistor elements on a surface of said substrate, the resistor elements electrically interconnecting conductive material strips associated with more distantly spaced rows of vias, no via in the substrate being associated with more than one resistor element.
Claim 11
Dependent Claim
119 words
An electrical circuit component, comprising: (a) a wafer of electrically insulating material having first and second surfces of a size for holding a single component; (b) two vias spaced inward from the edges of the wafer and spaced apart from each other; (c) terminal pads surrounding at least two vias, the terminal pads being on the first and second surfaces of said wafer the pads extending to the ends of the wafer and extending to the sides of the wafer; (d) conductors within at least two vias and being electrically interconnected to the terminal pads surrounding those vias; and (e) a resistor element on a surface of said wafer and electrically interconnecting terminal pads surrounding at least two vias.
Claim 12
Dependent Claim
119 words
An electrical circuit component, comprising: (a) a wafer of electrically insulating material having first and second surfces of a size for holding a single component; (b) two vias spaced inward from the edges of the wafer and spaced apart from each other; (c) terminal pads surrounding at least two vias, the terminal pads being on the first and second surfaces of said wafer the pads extending to the ends of the wafer and extending to the sides of the wafer; (d) conductors within at least two vias and being electrically interconnected to the terminal pads surrounding those vias; and (e) a resistor element on a surface of said wafer and electrically interconnecting terminal pads surrounding at least two vias.
Claim 13
Dependent Claim
145 words
An array of spaced electrical circuit components, comprising: (a) a substrate of electrically insulating material having first and second surfaces; (b) spaced apart rows of vias in said substrate, the rows alternately being more distantly spaced and more closely spaced, the rows having a pattern comprising single rows and double rows, the vias being inward of the edges of the substrate; (c) a conductive material pad surrounding each via, such a pad being on each of said first and second surfaces of said substrate; (d) conductive material within said vias and electrically interconnecting the conductive material pads on said first and second surfaces surrounding said vias; and (e) resistor elements on a surface of said substrate, the resistor elements electrically interconnecting conductive material pads associated with more distantly spaced rows of vias, no via in the substrate being associated with more than one resistor element.
Claim 14
Dependent Claim
145 words
An array of spaced electrical circuit components, comprising: (a) a substrate of electrically insulating material having first and second surfaces; (b) spaced apart rows of vias in said substrate, the rows alternately being more distantly spaced and more closely spaced, the rows having a pattern comprising single rows and double rows, the vias being inward of the edges of the substrate; (c) a conductive material pad surrounding each via, such a pad being on each of said first and second surfaces of said substrate; (d) conductive material within said vias and electrically interconnecting the conductive material pads on said first and second surfaces surrounding said vias; and (e) resistor elements on a surface of said substrate, the resistor elements electrically interconnecting conductive material pads associated with more distantly spaced rows of vias, no via in the substrate being associated with more than one resistor element.
Claim 15
Dependent Claim
114 words
An electrical circuit component, comprising: (a) a wafer of electrically insulating material having first and second surfaces of a size for holding a single component; (b) two vias spaced inward from the edges of the wafer and spaced apart from each other; (c) terminal pads surrounding said vias, the terminal pads being on the first and second surfaces of said wafer, the pads being inward of the ends of the wafer and inward of the sides of the wafer; (d) conductors within said vias and being electrically interconnected to the terminal pads surrounding said vias; and (e) a resistor element on a surface of said wafer and electrically interconnecting terminal pads surrounding said vias.
Claim 16
Dependent Claim
114 words
An electrical circuit component, comprising: (a) a wafer of electrically insulating material having first and second surfaces of a size for holding a single component; (b) two vias spaced inward from the edges of the wafer and spaced apart from each other; (c) terminal pads surrounding said vias, the terminal pads being on the first and second surfaces of said wafer, the pads being inward of the ends of the wafer and inward of the sides of the wafer; (d) conductors within said vias and being electrically interconnected to the terminal pads surrounding said vias; and (e) a resistor element on a surface of said wafer and electrically interconnecting terminal pads surrounding said vias.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-11-29 | 1992-05-30 | 1992-11-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-11-29 | 1996-05-30 | 1996-11-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-11-29 | 2000-05-30 | 2000-11-29 | $7700.00 | Window Closed / Lapsed |