US4787080A
Expired / Lapsed
US
⏱️ 0.0 years remaining
PCM coder and decoder circuit having digital balancing network
Assignee: Hitachi Microcomputer System Ltd
•
Filing: 1986-08-08
•
Granted: 1988-11-22
•
Expires: 2006-08-08
Abstract
Abstract A PCM coder and decoder circuit for use in a subscriber line interface circuit of a telephone communication system has a digital balancing network for removing any echo signal. The digital balancing network is formed by series-connecting a first balancing circuit having characteristics corresponding to the fixed characteristics of a coder, decoder, etc. and a second balancing circuit having characteristics corresponding to variable characteristics of an external circuit including two-wire transmission line which is connected to the coder and decoder circuit. Thus, a replica of an echo signal is precisely produced, and the circuit configuration is simplified.
Inventors
- 👤 Kazuo Yamakido
- 👤 Takahiko Kozaki
- 👤 Shigeo Nishita
- 👤 Kenichi Ohwada
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 04:55
CPC Classifications
H; H04; H04M; H04M3/00; H04M3/005; H04B; H04B3/00; H04B3/02; H04B3/20; H04B3/23
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
184 words
In a PCM coder and decoder circuit having a D/A converter adapted to convert an input PCM signal into an analogue signal, and A/D converter adapted to convert an input analogue signal into a PCM signal, and a digital balancing network provided between the input terminal of said D/A converter and the output terminal of said A/D converter, the improvement which comprises: said digital balancing network being formed by cascade-connecting first and second balancing circuits, said first balancing circuit having predetermined non-variable characteristics approximated to transfer characteristics viewed from said digital balancing network toward said D/A converter and said A/D converter when the output terminal of said D/A converter and the input terminal of said A/D converter are shorted, and said second balancing circuit having characteristics approximated to the characteristics of a signal which is produced when a circuit having an impedance component is connected between the output terminal of said D/A converter and the input terminal of said A/D converter by a portion of the output of said D/A converter which undesirably enters said A/D converter through said circuit having an impedance component.
Claim 2
Dependent Claim
184 words
In a PCM coder and decoder circuit having a D/A converter adapted to convert an input PCM signal into an analogue signal, and A/D converter adapted to convert an input analogue signal into a PCM signal, and a digital balancing network provided between the input terminal of said D/A converter and the output terminal of said A/D converter, the improvement which comprises: said digital balancing network being formed by cascade-connecting first and second balancing circuits, said first balancing circuit having predetermined non-variable characteristics approximated to transfer characteristics viewed from said digital balancing network toward said D/A converter and said A/D converter when the output terminal of said D/A converter and the input terminal of said A/D converter are shorted, and said second balancing circuit having characteristics approximated to the characteristics of a signal which is produced when a circuit having an impedance component is connected between the output terminal of said D/A converter and the input terminal of said A/D converter by a portion of the output of said D/A converter which undesirably enters said A/D converter through said circuit having an impedance component.
Claim 3
Dependent Claim
47 words
A PCM coder and decoder circuit having a digital balancing network according to claim 1, wherein said circuit having an impedance component is either a two-wire to four-wire converter provided outside said PCM coder and decoder circuit or a circuit which includes said two-wire to four-wire converter.
Claim 4
Dependent Claim
39 words
A PCM coder and decoder circuit having a digital balancing network according to claim 1, wherein said digital balancing network is formed on a semiconductor integrated circuit together with said A/D converter and said D/A converter in one unit.
References Cited (Backward Citations)
US4072830A
Cited
US4527020A
Cited
US4480156A
Cited
US4377793A
Cited
US4577309A
Cited
EP0122594A2
Cited
US4672665A
Cited
US4731834A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-11-22 | 1992-05-23 | 1992-11-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-11-22 | 1996-05-23 | 1996-11-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-11-22 | 2000-05-23 | 2000-11-22 | $7700.00 | Window Closed / Lapsed |