Patent US856850A successfully refreshed from Google Patents.
Patent US4786993A successfully refreshed from Google Patents.
US4786993A
Expired / Lapsed
US
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Voltage amplifier for constant voltage biasing and amplifying signals from a MR sensor
Assignee: HGST Netherlands BV
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Filing: 1986-06-30
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Granted: 1988-11-22
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Expires: 2006-06-30
Abstract
Abstract An amplifier for voltage biasing and amplifying the signals produced by a magnetic sensor is provided. Electrically, the resistance of the sensor is disposed between the bases of a differential pair comprising the input stage of the amplifier. Constant bias voltage for the sensor is provided independently of sensor resistance. DC feedback to the input stage balances current flow in both paths of the differential input stage to correct for DC offset arising in the output from input stage emitter resistor. The amplified signal, representing ΔR h /R h , is sensed as a voltage across the magnetoresistive sensor, where ΔR h is the change in steady-state resistance, R h , of the sensor.
Inventors
- 👤 Stephen A. Jove
- 👤 Klaas B. Klaassen
- 👤 Calvin S. Nomura
- 👤 Jacobus C. L. van Peppen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 07:52
CPC Classifications
G; G01; G01R; G01R33/00; G01R33/02; G01R33/06; G01R33/09; G11; G11B; G11B5/00; G11B5/02; G11B2005/0002; G11B2005/0005; G11B2005/001; G11B2005/0013; G11B2005/0016
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
100 words
A circuit for simultaneously biasing and amplifying signals produced by a magnetoresistive sensor, said circuit comprising: a magnetoresistive sensor having a steady-state resistance value; a bias means to provide across said sensor a bias voltage having constant time average value; an input stage, having at least two transistors coupled in differential pair configuration and having the magnetoresistive sensor coupled between the bases of said pair of transistors, for amplifying voltage deviations from said constant time average value of the voltage across the magnetoresistive sensor; and an output stage, coupled to the input stage, for amplifying and transmitting signals received therefrom.
Claim 2
Dependent Claim
100 words
A circuit for simultaneously biasing and amplifying signals produced by a magnetoresistive sensor, said circuit comprising: a magnetoresistive sensor having a steady-state resistance value; a bias means to provide across said sensor a bias voltage having constant time average value; an input stage, having at least two transistors coupled in differential pair configuration and having the magnetoresistive sensor coupled between the bases of said pair of transistors, for amplifying voltage deviations from said constant time average value of the voltage across the magnetoresistive sensor; and an output stage, coupled to the input stage, for amplifying and transmitting signals received therefrom.
Claim 3
Dependent Claim
39 words
A circuit as in claim 1 wherein the signals amplified by said circuit are proportional to the relation ΔR h /R h , where ΔR h is the change in steady-state resistance, R h , of the magneto-resistive sensor.
Claim 4
Dependent Claim
35 words
A circuit as in claim 1 further including: a plurality of input stages; and selection means for activating one of the plurality of input stages and deactivating all of the remaining plurality of input stages.
Claim 5
Dependent Claim
25 words
A circuit as in claim 2 further including means for feeding forward signals to minimize DC offset voltage at the output of the output stage.
Claim 6
Dependent Claim
18 words
Apparatus as in claim 3 wherein said selection means is effective for deactivating all of said input stages.
Claim 7
Dependent Claim
126 words
A circuit having a first constant current source for simultaneously biasing, and amplifying signals produced by, a magnetoresistive sensor having a steady-state resistance value, said circuit comprising: a bias voltage for the magnetoresistive sensor having constant time average value; an input stage, having at least two transistors coupled in a first differential pair configuration and having the magnetoresistive sensor coupled between the bases thereof, and coupled to the first constant current source, for amplifying voltage deviations from said constant time average value of the voltage across said magnetoresistive sensor; output stage, coupled to the input stage, for amplifying and transmitting signals received from the input stage; and feedback means, coupled from the output stage to the input stage, for correcting variations in said bias voltage levels.
Claim 8
Dependent Claim
126 words
A circuit having a first constant current source for simultaneously biasing, and amplifying signals produced by, a magnetoresistive sensor having a steady-state resistance value, said circuit comprising: a bias voltage for the magnetoresistive sensor having constant time average value; an input stage, having at least two transistors coupled in a first differential pair configuration and having the magnetoresistive sensor coupled between the bases thereof, and coupled to the first constant current source, for amplifying voltage deviations from said constant time average value of the voltage across said magnetoresistive sensor; output stage, coupled to the input stage, for amplifying and transmitting signals received from the input stage; and feedback means, coupled from the output stage to the input stage, for correcting variations in said bias voltage levels.
Claim 9
Dependent Claim
41 words
The circuit as in claim 6 wherein the collectors and bases of the said first differential pair of transistors are coupled to the feedback means, and the emitters of said first differential pair are coupled to the first constant current source.
Claim 10
Dependent Claim
90 words
A circuit as in claim 6 wherein the feedback means includes: at least two transistors coupled in a second differential pair configuration for correcting the voltage at the bases of the first differential pair; and first and second follower transistors, coupled to the first differential pair, for coupling the variations in the voltage levels produced in the input stage to the second differential pair; said second differential pair being coupled to a second constant current source, and said follower transistors being coupled to third and fourth constant current sources, respectively.
Claim 11
Dependent Claim
35 words
A circuit as in claim 6 further including: a plurality of input stages; and selection means for activating one of the plurality of input stages and deactivating all of the remaining plurality of input stages.
Claim 12
Dependent Claim
18 words
The circuit as in claim 6 wherein the output stage comprises two resistors having substantially equal resistance value.
Claim 13
Dependent Claim
21 words
The circuit as in claim 6 wherein the current flowing in each transistor of the first differential pair is substantially equal.
Claim 14
Dependent Claim
22 words
The circuit as in claim 6 wherein the feedback means includes frequency setting means for setting the frequency response of the circuit.
Claim 15
Dependent Claim
14 words
The circuit as in claim 12 wherein the frequency setting means is a capacitor.
Claim 16
Dependent Claim
30 words
The circuit as in claim 6 further including feedforward means, coupled to the input and output stages, for controlling the DC offset voltage at the output of the output stage.
Claim 17
Dependent Claim
63 words
A circuit as in claim 6 wherein: the input stage further includes an emitter resistor coupled between the emitters of said differential pair, the emitter of one of said differential pair being coupled to the first constant current source; and said bias voltage being referenced to a voltage produced by a current from said first constant current source flowing through said emitter resistor.
Claim 18
Dependent Claim
22 words
The circuit as in claim 15 wherein the current flowing in each of the emitters of said differential pair is substantially equal.
Claim 19
Dependent Claim
47 words
The circuit as in claim 15 further including settling means for reducing the time required for said circuit to settle into steady-state operation after one of said plurality of input stages is deactivated and another of said input stages is activated or after activating any input stage.
Claim 20
Dependent Claim
35 words
The circuit as in claim 17 wherein the settling means comprise control means for temporarily increasing the available output drive current of said feedback means during activation of any of said plurality of input stages.
Claim 21
Dependent Claim
51 words
The circuit as in claim 17 wherein the settling means comprises first and second comparator means coupled to the output of said input stage for controlling the DC offset voltage thereat in response to a change in such DC offset voltage during deactivation of one and activation of another input stage.
Claim 22
Dependent Claim
18 words
Apparatus as in claim 9 wherein said selection means is effective for deactivating all of said input stages.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-11-22 | 1992-05-23 | 1992-11-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-11-22 | 1996-05-23 | 1996-11-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-11-22 | 2000-05-23 | 2000-11-22 | $7700.00 | Window Closed / Lapsed |