Lateral dual gate thyristor and method of fabricating same

Claim 1

A lateral dual gate thyristor comprising: a substrate having an included region of semiconductor material electrically isolated from said substrate by a buried layer of electrically insulated material; a layer of highly conductive buried semiconductor material overlying said buried layer of electrically insulative material and disposed in said electrically isolated region; an island of semiconductor material centrally disposed in the surface of said electrically isolated region and having a conductivity type opposite that of said electrically isolated region; a ring of semiconductor material disposed in the surface of said electrically isolated region and encircling said island, said ring having one surface contiguous with said island and another surface contiguous with said electrically isolated region, and said ring being formed of semiconductor material having the same conductivity type as said electrically isolated region but more heavily doped than said isolated region; at least one strip of semiconductor material disposed in the surface of said electrically isolated semiconductor region one end of said one strip being in electrical contact with said ring, the other end of said one strip being in contact with said highly conductive buried layer; a centrally disposed cathode formed in the surface of said island and having the same conductivity type as said ring; an anode formed in the surface of said electrically isolated semiconductor region spaced apart from said ring and having a conductivity type opposite that of said electrically isolated semiconductor region; a channel region formed in the surface of said electrically isolated semiconductor region having a conductivity type opposite that of said electrically isolated semiconductor region and spaced apart from said ring and said anode; a drain region of semi-conductor material formed wholly within the surface of said channel region and having a conductivity type opposite that of said channel region; a layer of dielectric disposed on the surface of said electrically isolated region; a first gate electrode disposed on said dielectric layer and registering with those portions of said channel and said electrically isolated semiconductor region interposed between said ring and said drain for capacitively connecting ring with said drain in order to turn-off said thyristor. a second gate electrode disposed on said dielectric layer and register with that portion of said island interposed between said cathode and said ring for capacitively providing an electrical link between said ring and said cathode in order to turn-on said thyristor.