US4780755A
Expired / Lapsed
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Frame buffer self-test
Assignee: Tektronix Inc
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Filing: 1987-10-26
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Granted: 1988-10-25
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Expires: 2007-10-26
Abstract
Abstract A color graphic display system has self-test capability for testing system elements between the frame buffer and the display monitor inputs. The DAC output analog signals are converted to a digital signal and processed to provide an output test bit, which is input to the graphics processor. Additional self-test hardware includes address and data lines from the graphics processor to the color map for directly loading test bit patterns into the color map. The system self-tests the frame buffer, shift registers and DACs by loading various predetermined test bit patterns into the frame buffer and the color map; cycling that data through the display system; reading the test bit; comparing the output test bit values to expected values; and reporting any errors detected. The system also includes a method for self-testing the refresh counter address path into the frame buffer.
Inventors
- 👤 David L. Knierim
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 16:29
CPC Classifications
H; H04; H04N; H04N17/00; H04N17/04; H04N17/045; G; G01; G01R; G01R35/00; G01R35/002
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
153 words
A display system with video analog self-test capability comprising: means, including a graphics processor, a frame buffer, shift registers, and a color map or grey scale map, for generating digital video data; a digital to analog converter (DAC) for receiving the digital video data and converting the digital video data to an analog signal for input to a cathode ray tube monitor to display an image; a flip-flop having Set and Reset inputs and an output defining a test bit connected to an input port of the processor; means for inputting the analog signal from the DAC to the set input of the flip-flop; means in the processor for controlling the Reset input of the flip-flop; and means for cycling digital data through the shift registers to produce a test output analog signal from the DAC; and means in the processor for comparing the test output analog signal with a predetermined expected output.
Claim 2
Dependent Claim
153 words
A display system with video analog self-test capability comprising: means, including a graphics processor, a frame buffer, shift registers, and a color map or grey scale map, for generating digital video data; a digital to analog converter (DAC) for receiving the digital video data and converting the digital video data to an analog signal for input to a cathode ray tube monitor to display an image; a flip-flop having Set and Reset inputs and an output defining a test bit connected to an input port of the processor; means for inputting the analog signal from the DAC to the set input of the flip-flop; means in the processor for controlling the Reset input of the flip-flop; and means for cycling digital data through the shift registers to produce a test output analog signal from the DAC; and means in the processor for comparing the test output analog signal with a predetermined expected output.
Claim 3
Dependent Claim
34 words
The display system of claim 1 wherein said means for inputting the analog signal includes means connected to the DAC to receive the analog signal for converting the analog signal to a digital signal.
Claim 4
Dependent Claim
74 words
The display system of claim 2, wherein said means for converting the analog signal to a digital signal comprises: a reference voltage source having a DC voltage level approximately equal to halfway between the minimum output level of the DAC and the maximum output level of the DAC; and a comparator having its inverting (minus) input connected to the DC reference voltage source and its non-inverting (plus) input connected to receive said analog signal.
Claim 5
Dependent Claim
47 words
The display system of claim 2 including at least two DACs and logic OR means, having its inputs connected to receive said DAC analog signals and its output connected to said Set input for setting the flip-flop in response to any one of said DAC analog signals.
Claim 6
Independent Claim
172 words
A method of self-testing in a video display system which includes a graphics processor and a digital to analog converter (DAC) having a digital input for inputting video data from the processor and an analog output for driving a graphics display monitor, the method comprising: providing self-test circuitry including a flip-flop having a Set input and an output defining to a test bit coupled to the processor; converting the DAC analog output signal to a digital signal; inputting the digital signal to the Set input of the flip-flop; performing at least one of the following tests: testing the DACs; testing the video frame buffer and shift registers for passing zeros; testing the video frame buffer and shift registers for passing ones; and testing the refresh counter address path into the video frame buffer; outputting the test bit from the flip-flop to the processor; comparing the test bit value to an expected test value for each test performed to detect an error; and in the event an error is detected, reporting the error.
Claim 7
Independent Claim
172 words
A method of self-testing in a video display system which includes a graphics processor and a digital to analog converter (DAC) having a digital input for inputting video data from the processor and an analog output for driving a graphics display monitor, the method comprising: providing self-test circuitry including a flip-flop having a Set input and an output defining to a test bit coupled to the processor; converting the DAC analog output signal to a digital signal; inputting the digital signal to the Set input of the flip-flop; performing at least one of the following tests: testing the DACs; testing the video frame buffer and shift registers for passing zeros; testing the video frame buffer and shift registers for passing ones; and testing the refresh counter address path into the video frame buffer; outputting the test bit from the flip-flop to the processor; comparing the test bit value to an expected test value for each test performed to detect an error; and in the event an error is detected, reporting the error.
Claim 8
Dependent Claim
95 words
The method of claim 5, wherein the display system includes a color map or grey scale map and testing the DAC comprises: loading the color map or grey scale map with all zeros; clearing the flip-flop; waiting at least a frame time; reading the test bit; comparing the test bit value to an expected value; loading the color map with all ones only in the section of the color map which corresponds to a selected color; waiting at least a frame time; reading the test bit; comparing the test bit value to an expected value.
Claim 9
Dependent Claim
69 words
The method of claim 5, wherein testing the frame buffer and shift registers for passing zero comprises: writing zeros to the entire video frame buffer; loading the zero location of the color map with zeros; loading the color map locations other than the zero location with ones; clearing the flip-flop; waiting at least a frame time; reading the test bit; comparing the test bit value to an expected value.
Claim 10
Dependent Claim
86 words
The method of claim 5, wherein testing the refresh counter address path includes: clearing the video frame buffer; loading the color map with ones, except for location zero; loading zeros into location zero of the color map; clearing the flip-flop; reading the refresh counter; setting one bit of a word in the frame buffer about to be displayed; reading the test bit; comparing the test bit value to an expected value; and repeating the foregoing steps for testing each of the other bits in the word.
Claim 11
Dependent Claim
35 words
The method of claim 5 wherein performing a test includes inputting a predetermined pattern of digital test data to the DAC; and the expected test value corresponds to the predetermined pattern of digital test data.
Claim 12
Dependent Claim
28 words
The method of claim 9 wherein the display system is an RGB color system having three DACs and the steps of claim 11 are performed for each DAC.
Claim 13
Dependent Claim
65 words
The method of claim 5, wherein testing the frame buffer and shift registers for passing a one comprises: setting one bit in the video frame buffer; clearing the flip-flop; waiting a time period sufficient for the set bit to be displayed; reading the test bit; comparing the test bit value to an expected value; and checking that only the correct shift register bit is set.
Claim 14
Dependent Claim
103 words
The method of claim 11, wherein said checking comprises: setting are bit of a selected word in all planes of the video frame buffer to one; clearing a location A of the color map, where N is the number of planes of video frame buffer and A=2 N -1; clearing the flip-flop; waiting a time period sufficient for the selected word to be displayed; reading the test bit; comparing the test bit value to an expected value; and repeating the above steps for each remaining bit in the selected word in the video frame buffer thereby testing all bits in the shift registers.
Claim 15
Independent Claim
128 words
A method of self-testing in a video display system which includes a graphics processor and a digital to analog converter (DAC) having an input for inputting video data from a color map or grey scale and an analog output for driving a graphics display monitor, the method comprising: providing self-test circuitry including a flip-flop having a Set input coupled to the DAC output and an output defining a test bit coupled to input the test bit to an input port of the processor; writing digital test data to a selected one of the frame buffer and color map or grey scale; clearing the flip-flop; waiting a predetermined period of time; reading the test bit at the flip-flop output; and comparing the test bit value to an expected value.
Claim 16
Independent Claim
128 words
A method of self-testing in a video display system which includes a graphics processor and a digital to analog converter (DAC) having an input for inputting video data from a color map or grey scale and an analog output for driving a graphics display monitor, the method comprising: providing self-test circuitry including a flip-flop having a Set input coupled to the DAC output and an output defining a test bit coupled to input the test bit to an input port of the processor; writing digital test data to a selected one of the frame buffer and color map or grey scale; clearing the flip-flop; waiting a predetermined period of time; reading the test bit at the flip-flop output; and comparing the test bit value to an expected value.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-10-25 | 1992-04-25 | 1992-10-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-10-25 | 1996-04-25 | 1996-10-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-10-25 | 2000-04-25 | 2000-10-25 | $7700.00 | Window Closed / Lapsed |