US4769619A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Compensated current mirror
Assignee: Maxim Integrated Products Inc
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Filing: 1986-08-21
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Granted: 1988-09-06
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Expires: 2006-08-21
Abstract
Abstract A current mirror includes first and second transistors having interconnected bases and having emitters respectively coupled through first and second resistors to a common potential source. A collector voltage of the first transistor is fed back to the transistor bases through a feedback capacitor, and through a unity gain amplifier and series resistor, to form a feedback loop for controlling the voltage at the transistor bases. A current source connected to the collector of the first transistor causes the second transistor to produce an output collector current substantially equal in magnitude to the input current. To prevent circuit instability, the feedback capacitor and the aforementioned series resistor are sized to reduce the frequency at which the open loop gain of the feedback loop is unity so that it does not exceed the short-circuit current gain-bandwidth product of the first transistor.
Inventors
- 👤 Stewart S. Taylor
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 11:02
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/265; H; H03; H03F; H03F1/00; H03F1/08; H03F1/083
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
125 words
A current mirror comprising: a potential source; first and second transistors each having a base, a collector and an emitter, the emitters of said first and second transistors each being resistively coupled to said potential source; a resistor; an amplifier having an input terminal and an output terminal, the collector of said first transistor being connected to the input terminal of said amplifier, the output terminal of said amplifier being coupled through said resistor to the bases of said first and second transistors; and a capacitor for capacitively coupling the collector of said first transistor to its base, said first transistor, said resistor, said amplifier and said capacitor forming a feedback loop for controlling a voltage at the bases of said first and second transistors.
Claim 2
Dependent Claim
125 words
A current mirror comprising: a potential source; first and second transistors each having a base, a collector and an emitter, the emitters of said first and second transistors each being resistively coupled to said potential source; a resistor; an amplifier having an input terminal and an output terminal, the collector of said first transistor being connected to the input terminal of said amplifier, the output terminal of said amplifier being coupled through said resistor to the bases of said first and second transistors; and a capacitor for capacitively coupling the collector of said first transistor to its base, said first transistor, said resistor, said amplifier and said capacitor forming a feedback loop for controlling a voltage at the bases of said first and second transistors.
Claim 3
Dependent Claim
38 words
The current mirror according to claim 1 wherein said resistor and capacitor are sized such that the frequency of operation at which an open loop gain of said feedback loop is unity does not exceed a predetermined frequency.
Claim 4
Dependent Claim
24 words
The current mirror according to claim 1 wherein said predetermined frequency is equal to a short-circuit current gain-bandwidth product characteristic of the first transistor.
Claim 5
Dependent Claim
23 words
The current mirror according to claim 1 wherein said first and second transistors and said capacitor are implemented in a common integrated circuit.
Claim 6
Dependent Claim
17 words
The current mirror according to claim 1 wherein said first and second transistors are pnp junction transistors.
Claim 7
Dependent Claim
23 words
The current mirror according to claim 1 wherein said first and second transistors are lateral pnp transistors implemented in a common integrated circuit.
Claim 8
Dependent Claim
148 words
A current mirror comprising: a potential source; first and second transistors each having a base, a collector and an emitter, the emitters of said first and second transistors each being resistively coupled to said potential source; a resistor; a current source; a third transistor having a base coupled to the collector of said first transistor, a collector coupled to said potential source, and an emitter coupled to said current source; a fourth transistor having a base coupled to the emitter of said third transistor through said resistor and having an emitter coupled to the bases of said first and second transistors; and a capacitor for capacitively coupling the collector of said first transistor to the base of said fourth transistor, said resistor, said first, third and fourth transistors, and said capacitor forming a feedback loop for controlling a voltage at the bases of said first and second transistors.
Claim 9
Dependent Claim
148 words
A current mirror comprising: a potential source; first and second transistors each having a base, a collector and an emitter, the emitters of said first and second transistors each being resistively coupled to said potential source; a resistor; a current source; a third transistor having a base coupled to the collector of said first transistor, a collector coupled to said potential source, and an emitter coupled to said current source; a fourth transistor having a base coupled to the emitter of said third transistor through said resistor and having an emitter coupled to the bases of said first and second transistors; and a capacitor for capacitively coupling the collector of said first transistor to the base of said fourth transistor, said resistor, said first, third and fourth transistors, and said capacitor forming a feedback loop for controlling a voltage at the bases of said first and second transistors.
Claim 10
Dependent Claim
43 words
The current mirror according to claim 7 wherein said first, second and fourth transistors are lateral pnp transistors and said third transistor is an npn transistor, said first, second, third and fourth transistors and said capacitor being implemented on a common integrated circuit.
References Cited (Backward Citations)
US4462005A
Cited
JPS59229908A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-09-06 | 1992-03-07 | 1992-09-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-09-06 | 1996-03-07 | 1996-09-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-09-06 | 2000-03-07 | 2000-09-06 | $7700.00 | Window Closed / Lapsed |