US4769559A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Switchable current source
Assignee: Motorola Solutions Inc
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Filing: 1987-06-02
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Granted: 1988-09-06
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Expires: 2007-06-02
Abstract
Abstract A switchable current source is provided for providing a relatively high frequency pulsed current to a load. The current source comprises six MOS transistors responsive to an enable signal and an input comprising a pulsating digital signal provide a pulsating digital output signal substantially similar to the input signal.
Inventors
- 👤 John K. Mahabadi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 22:20
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/687; H03K17/6871; G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
107 words
A circuit comprising: first means coupled to a first voltage for selectively supplying first and second currents; second means coupled between said first means and a second voltage for sinking said first and second currents, said second current passing through a load coupled between said first and second means; and third means coupled between a node between said first and second means and said second voltage and coupled to said second means for biasing said second means in response to an input signal, wherein said input signal comprises a digital signal having repeated pulses of a selected frequency and said output signal substantially has said selected frequency.
Claim 2
Dependent Claim
107 words
A circuit comprising: first means coupled to a first voltage for selectively supplying first and second currents; second means coupled between said first means and a second voltage for sinking said first and second currents, said second current passing through a load coupled between said first and second means; and third means coupled between a node between said first and second means and said second voltage and coupled to said second means for biasing said second means in response to an input signal, wherein said input signal comprises a digital signal having repeated pulses of a selected frequency and said output signal substantially has said selected frequency.
Claim 3
Dependent Claim
65 words
The circuit according to claim 1 wherein said first means comprises: a first MOS transistor having a gate coupled to an enable signal and a source-drain current path coupled between said first voltage and a first node; and a second MOS transistor having a gate coupled to said enable signal and a source-drain current path coupled between said first voltage and a first output terminal.
Claim 4
Dependent Claim
65 words
The circuit according to claim 2 wherein said second means comprises: a third MOS transistor having a gate coupled to a second node and a source-drain current path coupled between said first node and said second voltage; and a fourth MOS transistor having a gate coupled to said second node and a source-drain current path coupled between said second voltage and a second output terminal.
Claim 5
Dependent Claim
64 words
The circuit according to claim 3 wherein said third means comprises: a fifth MOS transistor having a gate coupled to said input signal and a source-drain current path coupled between said first node and said second node; and a sixth MOS transistor having a gate coupled to said input signal and a source-drain current path coupled between said second voltage and said second node.
Claim 6
Dependent Claim
191 words
A switchable current source comprising: a first voltage terminal; a second voltage terminal; an enable terminal; an input terminal; a first output terminal; a second output terminal; a first MOS transistor having a gate coupled to said enable terminal and a source-drain current path coupled between said first voltage terminal and a first node; a second MOS transistor having a gate coupled to said enable terminal and a source-drain current path coupled between said first voltage terminal and said first output terminal; a third MOS transistor having a gate coupled to a second node and a source-drain current path coupled between said second voltage terminal and said first node; a fourth MOS transistor having a gate coupled to said second node and a source-drain current path coupled between said second output terminal and said second voltage terminal; a fifth MOS transistor having a gate coupled to said input terminal and a source-drain current path coupled between said first node and said second node; and a sixth MOS transistor having a gate coupled to said input terminal and a source-drain current path coupled between said second voltage terminal and said second node.
Claim 7
Dependent Claim
191 words
A switchable current source comprising: a first voltage terminal; a second voltage terminal; an enable terminal; an input terminal; a first output terminal; a second output terminal; a first MOS transistor having a gate coupled to said enable terminal and a source-drain current path coupled between said first voltage terminal and a first node; a second MOS transistor having a gate coupled to said enable terminal and a source-drain current path coupled between said first voltage terminal and said first output terminal; a third MOS transistor having a gate coupled to a second node and a source-drain current path coupled between said second voltage terminal and said first node; a fourth MOS transistor having a gate coupled to said second node and a source-drain current path coupled between said second output terminal and said second voltage terminal; a fifth MOS transistor having a gate coupled to said input terminal and a source-drain current path coupled between said first node and said second node; and a sixth MOS transistor having a gate coupled to said input terminal and a source-drain current path coupled between said second voltage terminal and said second node.
References Cited (Backward Citations)
US4645948A
Cited
US4694201A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-09-06 | 1992-03-07 | 1992-09-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-09-06 | 1996-03-07 | 1996-09-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-09-06 | 2000-03-07 | 2000-09-06 | $7700.00 | Window Closed / Lapsed |