US4764839A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low voltage reset circuit
Assignee: Zenith Electronics LLC
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Filing: 1987-01-08
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Granted: 1988-08-16
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Expires: 2007-01-08
Abstract
Abstract A low voltage reset circuit includes a first transistor having a base connected to a voltage divider and an emitter connected to the junction of a resistor-diode arrangement such that when the supply voltage falls to a trigger voltage level, the transistor is driven conductive. A second transistor is connected to the collector of the first transistor and is driven conductive therewith for applying a reset voltage to the reset terminal of a microprocessor. The collector of the second transistor is returned through a resistor to the base of said first transistor to provide positive feedback such that the first transistor is maintained in conduction until the supply voltage rises above the trigger voltage level.
Inventors
- 👤 Timothy G. Laud
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 05:15
CPC Classifications
H; H02; H02H; H02H3/00; H02H3/24; H02H3/243; G; G06; G06F; G06F1/00; G06F1/24
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
107 words
A reset circuit comprising: a voltage source; a utilization device connected to said voltage source and including a reset terminal; a low voltage trigger means including a first transistor coupled to said voltage source for supplying a reset signal to said reset terminal when the voltage from said voltage source falls to a trigger voltage level; and holding means including a second transistor coupled by a feedback resistor to said low voltage trigger means and being driven conductive responsive to activation of said first transistor for causing said first transistor to maintain said reset signal until voltage from said voltage source rises above said trigger voltage level.
Claim 2
Dependent Claim
107 words
A reset circuit comprising: a voltage source; a utilization device connected to said voltage source and including a reset terminal; a low voltage trigger means including a first transistor coupled to said voltage source for supplying a reset signal to said reset terminal when the voltage from said voltage source falls to a trigger voltage level; and holding means including a second transistor coupled by a feedback resistor to said low voltage trigger means and being driven conductive responsive to activation of said first transistor for causing said first transistor to maintain said reset signal until voltage from said voltage source rises above said trigger voltage level.
Claim 3
Dependent Claim
57 words
The circuit of claim 1 wherein said first transistor in said low voltage trigger means changes from a first conductivity state to a second conductivity state responsive to said voltage source falling below said trigger voltage level and wherein said second transistor in said holding means prevents said first transistor from reverting to said first conductivity state.
Claim 4
Dependent Claim
47 words
The circuit of claim 2, further including a bias arrangement comprising a voltage divider coupled across said voltage source and connected to the base of said first transistor and a diode reference circuit coupled across said voltage source and connected to the emitter of said first transistor.
Claim 5
Dependent Claim
158 words
A reset circuit comprising: a voltage source; microprocessor means connected across said voltage source and including a reset terminal; resistive voltage divider means connected across said voltage source and having a junction; a series circuit comprising diode means and resistor means connected across said voltage source; a first transistor having a base connected to said junction of said resistive voltage divider means, an emitter connected between said diode means and said resistor means and a collector; a second transistor coupled to said collector of said first transistor and being driven conductive responsive to conduction of said first transistor for applying a reset signal to said reset terminal; and a feedback resistor connected from said reset terminal to said base of said first transistor, whereby said reset signal is established when the voltage from said voltage source falls to a trigger voltage level and is maintained until the voltage from said voltage source rises above said trigger voltage level.
Claim 6
Dependent Claim
158 words
A reset circuit comprising: a voltage source; microprocessor means connected across said voltage source and including a reset terminal; resistive voltage divider means connected across said voltage source and having a junction; a series circuit comprising diode means and resistor means connected across said voltage source; a first transistor having a base connected to said junction of said resistive voltage divider means, an emitter connected between said diode means and said resistor means and a collector; a second transistor coupled to said collector of said first transistor and being driven conductive responsive to conduction of said first transistor for applying a reset signal to said reset terminal; and a feedback resistor connected from said reset terminal to said base of said first transistor, whereby said reset signal is established when the voltage from said voltage source falls to a trigger voltage level and is maintained until the voltage from said voltage source rises above said trigger voltage level.
References Cited (Backward Citations)
US4520418A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-08-16 | 1992-02-15 | 1992-08-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-08-16 | 1996-02-15 | 1996-08-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-08-16 | 2000-02-15 | 2000-08-16 | $7700.00 | Window Closed / Lapsed |