Computer program debugging system

Claim 1

A program debugging system for a computer having at least an arithmetic/logic controller for implementing arithmetic/logic operations for data in accordance with a stored program and a program debugging device which issues a command for correcting an error in said program to said arithmetic/logic controller, said program debugging system comprising: a readout data addressing unit, incorporated in said program debugging device, for specifying an address of data which a debugging operator desires to read out, in case of occurrence of an error in said arithmetic/logic controller; an address setting memory incorporated in said arithmetic/logic controller and operative to write an address specified by said readout data addressing unit; a data readout commander incorporated in said program debugging device and operative to command a readout process for said error-causing data at the occurrence of error an error detector incorporated in said arithmetic/logic controller; a data register incorporated in said arithmetic/logic controller and actuated by an actuation command from said data readout commander and reading out address data which are specified by said address setting memory in accordance with a detected result provided by said error detector, said error detector being connected to said data register; said program debugging device including a first interface and said arithmetic/logic controller including a second interface; a data memory incorporated in said arithmetic/logic controller for storing data read out by said data register and delivering the data to said program debugging device through said interfaces; and said program debugging device including a data receive/edit unit, said data receive/edit unit being operative to receive data sent from said data memory through said interfaces and to edit the data.