High integrity digital processor architecture

Claim 1

Digital data processing apparatus for processing data including state variable comprising non-volatile random access memory means for receiving and storing present and past values of said state variables, digital data processing means having an applications program with instructions for storing and retrieving said state variables in said non-volatile random access memory means, each instruction having a base address, monitor means coupled to said digital data processing means for detecting a disruption of data processing in said digital data processing means, for providing an increment signal when a disruption has not been detected, and for providing a decrement signal and initiating a restart operation in said digital data processing means upon detection of a disruption, index means coupled to said monitor means for providing an index code incremented in response to said increment signal and decremented in response to said decrement signal, and means coupled to said index means and said non-volatile random access means for adding said index code to said base addresses so that storage of said state variables is distributed throughout said non-volatile random access memory in response to said increment signals and a previously stored state variable is accessed in response to said decrement signals.