US4751199A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process of forming a compliant lead frame for array-type semiconductor packages
Assignee: National Semiconductor Corp
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Filing: 1987-01-21
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Granted: 1988-06-14
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Expires: 2007-01-21
Abstract
Abstract A lead frame that is suited for use on array types of integrated circuit packages to provide a high degree of compliance for absorbing mechanical stress induced by thermal changes includes a series of individual terminal elements that are connected in a strip form by means of break tabs disposed between adjacent elements. Each terminal element provides two spaced, generally parallel mounting surfaces that are resiliently connected to one another by means of an integral intermediate section. While the terminal elements are interconnected in strip form, one of the mounting surfaces of each element can be bonded to an associated attachment region on the semiconductor substrate. After all of the terminals of the strip have been so bonded, the break tabs between adjacent terminals can be removed to thereby separate the terminals from one another. The package which then results contains discrete compliant terminals which are suitable for subsequent surface attachment to the printed circuit board.
Inventors
- 👤 William S. Phy
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 12:27
CPC Classifications
H; H05; H05K; H05K7/00; H05K7/02; H05K7/12; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/341; H05K3/3421; H05K3/3426; H05K1/00; H05K1/02; H05K1/0271; H05K2201/00; H05K2201/10; H05K2201/10613; H05K2201/10621; H05K2201/10719; H05K2201/10742; H05K2201/1075; H05K2201/10757; H05K2201/10818; H05K2201/10886; H05K2201/10924; H05K2201/10946; Y; Y02; Y02P; Y02P70/00; Y02P70/50; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121; Y10T29/49124; Y10T29/4913; Y10T29/49133; Y10T29/49135; Y10T29/53; Y10T29/5313; Y10T29/53174
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
169 words
A method for attaching high compliance leads to a semiconductor package having bonding sites arranged in a matrix pattern on a surface thereof, for subsequent attachment to the surface of a printed circuit board having a corresponding matrix arrangement of mounting regions, comprising the steps of: forming lead frames each comprised of a strip of terminal elements connected in a side-by-side arrangement by means of break tabs disposed between adjacent elements, each terminal element having a pair of spaced, resiliently interconnected mounting surfaces; bonding one of the mounting surfaces of each terminal element on one of said frames to respective bonding sites in one row of the matrix pattern on the semiconductor package while said terminal elements are connected in strip form; and removing the break tabs from the lead frame after said bonding step to thereby separate said terminal elements from one another for subsequent attachment of the other mounting surface of each terminal element to a corresponding mounting region on the surface of a printed circuit board.
Claim 2
Independent Claim
169 words
A method for attaching high compliance leads to a semiconductor package having bonding sites arranged in a matrix pattern on a surface thereof, for subsequent attachment to the surface of a printed circuit board having a corresponding matrix arrangement of mounting regions, comprising the steps of: forming lead frames each comprised of a strip of terminal elements connected in a side-by-side arrangement by means of break tabs disposed between adjacent elements, each terminal element having a pair of spaced, resiliently interconnected mounting surfaces; bonding one of the mounting surfaces of each terminal element on one of said frames to respective bonding sites in one row of the matrix pattern on the semiconductor package while said terminal elements are connected in strip form; and removing the break tabs from the lead frame after said bonding step to thereby separate said terminal elements from one another for subsequent attachment of the other mounting surface of each terminal element to a corresponding mounting region on the surface of a printed circuit board.
Claim 3
Dependent Claim
28 words
The method of claim 1 wherein said forming step comprises shaping a single piece of metal into a series of alternating and integral terminal elements and break tabs.
Claim 4
Dependent Claim
17 words
The method of claim 2, wherein each of said terminal elements is formed to be generally C-shaped.
Claim 5
Dependent Claim
17 words
The method of claim 2, wherein each of said terminal elements is formed to be generally J-shaped.
Claim 6
Dependent Claim
17 words
The method of claim 2, wherein each of said terminal elements is formed to be generally Z-shaped.
Claim 7
Dependent Claim
17 words
The method of claim 2, wherein each terminal element is formed to be compliant in two axes.
Claim 8
Dependent Claim
64 words
The method of claim 2, wherein each terminal element is formed by bending a strip of conducting material into a generally C-shaped structure having the two mounting surfaces formed on the legs thereof and connected by an intermediate base, and rotating one of said mounting surfaces about 90° relative to the other of said mounting surfaces to provide a twist in said intermediate base.
Claim 9
Dependent Claim
15 words
The method of claim 7, wherein the resulting terminal element is compliant in three axes.
Claim 10
Independent Claim
203 words
A method for mounting an integrated circuit package having bonding sites arranged in a matrix pattern on one surface thereof to a printed circuit board having a corresponding matrix arrangement of mounting regions in a manner which provides mechanical compliance to absorb stresses caused by relative movement between the integrated circuit package and the printed circuit board, comprising the steps of: forming a conductive material into a plurality of lead frame strips each of which comprises a linear array of terminal elements having two spaced, generally parallel mounting surfaces interconnected by a resilient intermediate section and break tabs interposed between and connected to adjacent terminal elements; placing lead frame strips on respective rows of bonding sites on said integrated circuit package such that one mounting surface on each terminal element in a strip engages a corresponding bonding site in its respective row of the matrix pattern; bonding said one mounting surface of each terminal to the bonding site which it engages; twisting said break tabs and removing them from said strips to thereby separate the terminal elements in each strip from one another; and bonding the other mounting surface of each terminal element to a corresponding mounting region on said printed circuit board.
Claim 11
Independent Claim
203 words
A method for mounting an integrated circuit package having bonding sites arranged in a matrix pattern on one surface thereof to a printed circuit board having a corresponding matrix arrangement of mounting regions in a manner which provides mechanical compliance to absorb stresses caused by relative movement between the integrated circuit package and the printed circuit board, comprising the steps of: forming a conductive material into a plurality of lead frame strips each of which comprises a linear array of terminal elements having two spaced, generally parallel mounting surfaces interconnected by a resilient intermediate section and break tabs interposed between and connected to adjacent terminal elements; placing lead frame strips on respective rows of bonding sites on said integrated circuit package such that one mounting surface on each terminal element in a strip engages a corresponding bonding site in its respective row of the matrix pattern; bonding said one mounting surface of each terminal to the bonding site which it engages; twisting said break tabs and removing them from said strips to thereby separate the terminal elements in each strip from one another; and bonding the other mounting surface of each terminal element to a corresponding mounting region on said printed circuit board.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-06-14 | 1991-12-14 | 1992-06-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-06-14 | 1995-12-14 | 1996-06-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-06-14 | 1999-12-14 | 2000-06-14 | $7700.00 | Window Closed / Lapsed |