Patent US4749956A successfully refreshed from Google Patents.
US4749956A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Fully-differential operational amplifier for MOS integrated circuits
Assignee: STMicroelectronics SRL
•
Filing: 1986-07-18
•
Granted: 1988-06-07
•
Expires: 2006-07-18
Abstract
Abstract A single-stage fully differential operational amplifier has a high open-loop gain and can be incorporated in a very small area of silicon and has a very small number of bias interconnection lines. The amplifier includes two identical arms each having similar bias and loads, transconductance and common-mode feedback elements. Each of the aforementioned three elements in each branch have the same current flowing therethrough when the amplifier is quiescent.
Inventors
- 👤 Guido Torelli
- 👤 Alejandro de la Plaza
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 16:17
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45479; H03F3/45632; H03F3/45636; H03F3/45641; H03F3/4565; H03F3/45076; H03F3/45179; H03F3/45183; H03F3/45188; H03F3/45192; H03F3/45654; H03F2203/00; H03F2203/45; H03F2203/45398; H03F2203/45651; H03F2203/45732
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
197 words
A single-stage fully differential operational amplifier having a high open-loop gain and first and second inputs and first and second outputs comprising first and second substantially identical branches each comprising a bias and load stage and a transconductance stage and a common mode feedback stage connected in series; said first and second inputs being respectively connected to inputs of said transconductance stages of said first and second branches and said first and second outputs being respectively connected to outputs of said bias and load stages of said first and second branches and inputs of said common mode feedback stages of said first and second branches being respectively connected to said outputs of said bias and load stages of said first and second branches; wherein said transconductance stages transform inputs signals supplied thereto and said bias and load stages provide biasing and electrical loads for their respective transconductance stages and said common mode feedback stages stabilize output voltages of their respective bias and load stages when said input signals to their respective transconductance stages are equal to zero; and wherein when said input signals are equal to zero, currents flowing through said first and second branches are equal.
Claim 2
Dependent Claim
197 words
A single-stage fully differential operational amplifier having a high open-loop gain and first and second inputs and first and second outputs comprising first and second substantially identical branches each comprising a bias and load stage and a transconductance stage and a common mode feedback stage connected in series; said first and second inputs being respectively connected to inputs of said transconductance stages of said first and second branches and said first and second outputs being respectively connected to outputs of said bias and load stages of said first and second branches and inputs of said common mode feedback stages of said first and second branches being respectively connected to said outputs of said bias and load stages of said first and second branches; wherein said transconductance stages transform inputs signals supplied thereto and said bias and load stages provide biasing and electrical loads for their respective transconductance stages and said common mode feedback stages stabilize output voltages of their respective bias and load stages when said input signals to their respective transconductance stages are equal to zero; and wherein when said input signals are equal to zero, currents flowing through said first and second branches are equal.
Claim 3
Dependent Claim
36 words
An amplifier as in claim 1, wherein each transconductance stage comprises an MOS transistor and each bias and load stage comprises a pair of MOS transistors and each common mode feedback stage comprises an MOS transistor.
Claim 4
Dependent Claim
41 words
An amplifier as in claim 1, further comprising a reference voltage generator for supplying a reference voltage to said first and second inputs, said reference voltage generator being substantially identical to one of said first and second branches of said amplifier.
Claim 5
Dependent Claim
41 words
An amplifier as in claim 2, further comprising a reference voltage generator for supplying a reference voltage to said first and second inputs, said reference voltage generator being substantially identical to one of said first and second branches of said amplifier.
References Cited (Backward Citations)
US4616189A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-06-07 | 1991-12-07 | 1992-06-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-06-07 | 1995-12-07 | 1996-06-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-06-07 | 1999-12-07 | 2000-06-07 | $7700.00 | Window Closed / Lapsed |