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A method of manufacturing semiconductor elements-isolating silicon oxide layers

Assignee: Toshiba Corp
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Filing: 1987-02-17
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Granted: 1988-05-24
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Expires: 2007-02-17
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Abstract

Abstract A semiconductor manufacturing method which comprises the steps of forming a polycrystalline silicon layer on a semiconductor substrate; depositing a silicon oxide layer on the polycrystalline silicon layer; mounting an acidproof layer on the silicon oxide layer; selectively eliminating the acidproof layer deposited on a semiconductor element-isolating region by the photoetching process; selectively eliminating the silicon oxide layer with the retained acidproof layer used as a mask; ion implanting a channel stopper impurity in the semiconductor substrate through the masks formed of a photoresist coated on the acidproof layer the acidproof layer, and silicon oxide layer; eliminating the photoresist; selectively depositing a silicon layer on the exposed polycrystalline silicon; carrying out thermal oxidation with the acidproof layer used as a mask; eliminating the acidproof layer; filling an oxide in the cavities of the side walls of the semiconductor element-isolating insulation layer; and exposing by etching that portion of the semiconductor substrate which will constitute a semiconductor element region, thereby forming a thick semiconductor element-isolating layer with high precision in a narrow semiconductor element-isolating region.

Inventors

  • 👤 Sigeru Morita
  • 👤 Masakazu Kakumu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 16:24
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/69; H10P14/692; H10P14/6921; H10P14/69215; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0125; H10W10/0126; H10W10/10; H10W10/13

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 253 words
A method of manufacturing semiconductor element-isolating silicon oxide layers comprising the steps of: forming a first silicon oxide layer on a semiconductor substrate; depositing a first polycrystalline silicon layer on said first silicon oxide layer; forming a second silicon oxide layer on said first polycrystalline silicon layer; providing an acidproof layer on said second silicon oxide layer; selectively eliminating that portion of said acidproof layer corresponding to a semiconductor element-isolating region to be formed; selectively removing said second silicon oxide layer with the retained portion of said acidproof layer used as a mask thereby exposing a portion of said first polycrystalline silicon layer; ion-implanting an impurity used for forming a channel stopper in the semiconductor substrate by applying a photoresist coated on said acidproof layer during the selective elimination of the portion of said acidproof layer, said acidproof layer and second silicon oxide layer all used as masks; selectively growing a silicon layer on said exposed portion of said first polycrystalline silicon layer after the elimination of said photoresist; subjecting said silicon layer and said first polycrystalline layer to selective thermal oxidation with said retained portion of said acidproof layer used as a mask thereby forming a semiconductor element-isolating insulation layer having an annular groove; eliminating said retained portion of said acidproof layer; filling said annular groove in the side walls of said semiconductor element-isolating insulation layer with a silicon oxide; and exposing by etching that portion of the surface of the semiconductor substrate which is formed to be a semiconductor element region.
Claim 2
Independent Claim 253 words
A method of manufacturing semiconductor element-isolating silicon oxide layers comprising the steps of: forming a first silicon oxide layer on a semiconductor substrate; depositing a first polycrystalline silicon layer on said first silicon oxide layer; forming a second silicon oxide layer on said first polycrystalline silicon layer; providing an acidproof layer on said second silicon oxide layer; selectively eliminating that portion of said acidproof layer corresponding to a semiconductor element-isolating region to be formed; selectively removing said second silicon oxide layer with the retained portion of said acidproof layer used as a mask thereby exposing a portion of said first polycrystalline silicon layer; ion-implanting an impurity used for forming a channel stopper in the semiconductor substrate by applying a photoresist coated on said acidproof layer during the selective elimination of the portion of said acidproof layer, said acidproof layer and second silicon oxide layer all used as masks; selectively growing a silicon layer on said exposed portion of said first polycrystalline silicon layer after the elimination of said photoresist; subjecting said silicon layer and said first polycrystalline layer to selective thermal oxidation with said retained portion of said acidproof layer used as a mask thereby forming a semiconductor element-isolating insulation layer having an annular groove; eliminating said retained portion of said acidproof layer; filling said annular groove in the side walls of said semiconductor element-isolating insulation layer with a silicon oxide; and exposing by etching that portion of the surface of the semiconductor substrate which is formed to be a semiconductor element region.
Claim 3
Dependent Claim 19 words
The method according to claim 1, wherein said first polycrystalline silicon layer is formed by the epitaxial growth process.
Claim 4
Dependent Claim 39 words
The method according to claim 1, wherein the step of forming said second silicon oxide layer on said first polycrystalline silicon layer is performed by oxidizing the surface of said first polycrystalline silicon layer in an atmosphere of oxygen.
Claim 5
Dependent Claim 39 words
The method according to claim 1, wherein the step of selectively eliminating said portion of said acidproof layer corresponding to said semiconductor element-isolating region to be formed is carried out by the reactive ion etching process using fluorine gas.
Claim 6
Dependent Claim 87 words
The method according to claim 1, wherein the step of filling a silicon oxide in said annular groove of the side walls of said semiconductor element-isolating insulation layer involves the processes of depositing a second polycrystalline silicon layer on the whole surface of said semiconductor substrate, eliminating said second polycrystalline silicon layer by an anisotropic etching process except for that portion formed in said annular groove, and converting the polycrystalline silicon layer retained in said annular groove of the side walls into silicon oxide by thermal oxidation.
Claim 7
Dependent Claim 64 words
The method according to claim 1, wherein the step of filling a silicon oxide in said annular groove of the side walls of said semiconductor element-isolating insulation layer involves the processes of mounting a third silicon oxide layer on the whole surface of said semiconductor substrate and eliminating by anisotropic etching said silicon oxide layer except for that portion formed in said annular groove.
Claim 8
Dependent Claim 37 words
The method according to claim 1, wherein the selective oxidation of said silicon layer and said first polycrystalline silicon layer to provide a semiconductor element-isolating insulation layer is continued until part of said semiconductor substrate is oxidized.
Claim 9
Dependent Claim 15 words
The method according to claim 1, wherein said acidproof layer is a silicon nitride layer.
Claim 10
Dependent Claim 16 words
The method according to claim 1, wherein said silicon layer is formed of a polycrystalline layer.
Claim 11
Dependent Claim 17 words
The method according to claim 1, wherein said silicon layer consists of a single crystal silicon layer.

References Cited (Backward Citations)

US4214946A Cited
JPS5922344A Cited
US4570325A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-05-24 1991-11-23 1992-05-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-05-24 1995-11-23 1996-05-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-05-24 1999-11-23 2000-05-24 $7700.00 Window Closed / Lapsed

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