Low dissipation power converter

Claim 1

An electric power converter comprising: a first transistor and a second transistor serially connected between positive and negative terminals of a DC source, each of said transistors comprising an emitter terminal and a base terminal and a collector terminal, the emitter terminal of said first transistor being connected via a first junction point to the collector terminal of said second transistor; a power transformer having a primary winding, a secondary winding and a saturable core inductively coupled to said primary and secondary windings; a bypass circuit coupled between said positive and said negative terminals of said DC source, said bypass circuit comprising first and second capacitors serially connected at a second junction point, said primary winding being connected between said first junction point and said second junction point; means magnetically coupled to said transformer for applying base current alternately to said first and said second transistors to induce states of conduction of current alternately in each of said transistors, the current in each of said transistors passing through said primary winding and inducing a voltage drop across said primary winding during a nonsaturated condition of said transformer core for minimizing power dissipation in each of said transistors, saturation of said transformer core reversing polarity of said current applying means to alternate activation of said two transistors, alternate flow of current in said transistors via said primary winding resulting in an oscillatory current in said primary winding, the oscillatory current inducing a voltage at said secondary winding suitable for operation of a load external to said converter; a first transformer winding magnetically coupled to said base-current-applying means and connected between an emitter terminal of said first transistor and a collector terminal of said second transistor; and a second transformer winding magnetically coupled to said base-current-applying means and connected between an emitter terminal of said second transistor and a junction of said bypass circuit with said DC source, said first and second tranformer windings acting to decrease voltage across said first and said second transistors respectively during states of conduction in said transistors.