Semiconductor device

Claim 1

A semiconductor device comprising: a semiconductor body of one conductivity type; a plurality of wells of an opposite conductivity type formed in the surface area of said semiconductor body; a plurality of groups of MIS transistors, each of said transistors having source and drain regions formed in the surface area of one of said wells; a plurality of embedded layers of the opposite conductivity type each being associated with the wells of one of said groups and each formed in contact with those ones of said wells which contain the associated group of said MIS transistors, each of said embedded layers having a higher impurity concentration than the associated wells, said embedded layers being separated from the surface of said semiconductor body by a predetermined distance, and each of said wells being in contact with the upper surface of the associated embedded layer; a plurality of electrode means for causing one group of said MIS transistors to have different characteristics from another group of said MIS transistors, each of said electrode means being respectively connected to a different one of said embedded layers, said electrode means being selectively set at different potentials from each other; and a plurality of second MIS transistors each of which has source and drain regions formed in the surface area of said semiconductor body and which have a complementary relationship with the first MIS transistors, at least one of said second MIS transistors being positioned above one of said embedded layers between two of said wells containing first MIS transistors of one of said groups.