Abstract An electrically programmable logic array (10) for binary signals having signal inputs A 0 -A x ) and signal outputs Q 0 -Q i ) comprises two row lines (a 0 ,a 0' -a x , a x' ) for each signal input. The signal applied to the signal input is generatable at the one row line in non-negated form and at the other row line in negated form. For each signal output a column line (q 0 -q i ) is provided. In the non-programmable state between each row line and each column line there is an electrically conductive connection interruptable for the purpose of programming. Inserted into the connection between the signal inputs and each associated row line is a controllable switching member (S 0 ,S 0' ,-S x , S x' ) which is controllable by a control signal applied thereto in such a manner that its output signal changes with the signal applied to the associated signal input or irrespective of said signal always retains a predetermined signal value.
Electrically programmable binary logic array having signal inputs and signal outputs, comprising in combination two row lines for each signal input, means for generating the signal input at the one row line in true form and at the other row line in complement form, a column line for each signal output, a connection between each row line and each column line which is electrically conductive in the non-programmed state and interruptable for the purpose of the programming, a controllable switching member between the signal inputs and each of the row conductors, and means for applying a control signal thereto in such a manner that its output signal changes with the signal applied to the associated signal input or irrespective of said signal always retains a predetermined signal value.
Claim 2
Dependent Claim
128 words
Electrically programmable binary logic array having signal inputs and signal outputs, comprising in combination two row lines for each signal input, means for generating the signal input at the one row line in true form and at the other row line in complement form, a column line for each signal output, a connection between each row line and each column line which is electrically conductive in the non-programmed state and interruptable for the purpose of the programming, a controllable switching member between the signal inputs and each of the row conductors, and means for applying a control signal thereto in such a manner that its output signal changes with the signal applied to the associated signal input or irrespective of said signal always retains a predetermined signal value.
Claim 3
Dependent Claim
43 words
Logic array according to claim 1, characterized in that the switching members are NAND circuits which have two inputs, of which in each case one is connected to the associated signal input and the other is connected to one of two control inputs.