Dynamically controlled interleaving

Claim 1

A data processing system for interleaving units of information among an arbitrary group of memory controllers, the system comprising: a plurality of memory controllers each connected to corresponding storage apparatus for storing information therein; address generating means for generating an address indicative of the storage apparatus in which the units of information are to be stored, which address includes a page address, a unit address, a select field and a plurality of memory controller address fields, each memory controller address field containing a memory controller address for one of the memory controllers of the arbitrary group; address register means coupled to the address generating means for storing the address generated thereby; selection means coupled to the address register means and responsive to the state of the select field in the address for selecting the memory controller address of only one of the memory controllers from the arbitrary group of memory controllers by selecting only one of the plurality of memory controller address fields, and by selecting different memory controller address fields for units of information having the same page address and consecutive unit addresses; and communication means coupled to the selection means and to the address register means for transmitting the page address and the unit address to the memory controller having the address selected by the selection means.