Analog accumulator

Claim 1

An analog accumulator for realizing M integrations of N analog samples of information in the form of N quantities of charges with N≧2 and M≧1 comprising: an N-stage input charge transfer shift register with a serial input for connection to a voltage-charge conversion means and N parallel outputs for receiving the packets of charges, N storage floating diodes, each connected to a respective output of the N-stage input charge transfer shift register, each storage floating diode providing the M integrations and temporary storing of the summation of the quantity of charges contained in the corresponding stage of the N-stage input charge transfer shift register, N reading floating diodes, each adjacent to an injection gate connected to the corresponding storage floating diode, means for injecting into the reading floating diodes a drive charge, a charge removal drain adjacent said injection gate, and an N-stage output charge transfer shift register with N parallel inputs and a serial output, each input connected to a respective one of the reading floating diodes through a switching means which is closed periodically a number of times after each set of M integrations, said N-stage output charge transfer shift register delivering at the end of the M integrations, the accumulated samples of information in the form of an analog signal.