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US4740481A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of preventing hillock formation in polysilicon layer by oxygen implanation

Assignee: Motorola Solutions Inc
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Filing: 1986-01-21
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Granted: 1988-04-26
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Expires: 2006-01-21
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Abstract

Abstract Hillock formation as a result of heating uncapped polycrystalline silicon layers can be avoided by first implanting the uncapped poly layers with silicon, oxygen, or nitrogen prior to heating. Equivalent mono-atomic oxygen or nitrogen doses in the range of about 10 15 to about 5×10 16 ions/cm 2 at energies in the range 10-50 keV are useful with good results being obtained with equivalent oxygen doses of 2×10 15 ions/cm 2 at 30 keV. When polysilicon layers with this oxygen implant are heated to about 1150 degrees C., a temperature which would ordinarily produce pronounced hillock formation in un-capped, un-treated poly layers, it is found that hillock formation is suppressed. The implanted oxygen concentrations are far below what is required to produce a separate oxide layer or phase. Some effect on poly layer sheet resistance is observed for implanted oxygen but the implanted layers have sheet resistances within a factor of two of those without the oxygen implants.

Inventors

  • 👤 Syd R. Wilson
  • 👤 Richard B. Gregory
  • 👤 Charles J. Varker

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 11:33
CPC Classifications
H; H10; H10P; H10P32/00; H10P32/30; H10P32/302; Y; Y10; Y10S; Y10S148/00; Y10S148/024; Y10S148/061; Y10S148/083; Y10S257/00; Y10S257/905; Y10S438/00; Y10S438/934; Y10S438/937

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 79 words
A method for preventing hillock formation in polycrystalline semiconductor layers comprising: providing a substrate having thereon a polycrystalline semiconductor layer with an exposed surface; implanting oxygen into said exposed surface only to a predetermined depth and dose in the range about 10 15 oxygen ions/cm 2 to 5×10 16 oxygen ions/cm 2 at energy in the range about 10-50 keV, O + equivalent, without implanting oxygen deeper into said layer than said predetermined depth; and thereafter heating said layer.
Claim 2
Independent Claim 79 words
A method for preventing hillock formation in polycrystalline semiconductor layers comprising: providing a substrate having thereon a polycrystalline semiconductor layer with an exposed surface; implanting oxygen into said exposed surface only to a predetermined depth and dose in the range about 10 15 oxygen ions/cm 2 to 5×10 16 oxygen ions/cm 2 at energy in the range about 10-50 keV, O + equivalent, without implanting oxygen deeper into said layer than said predetermined depth; and thereafter heating said layer.
Claim 3
Dependent Claim 44 words
The method of claim 1 wherein said implanting step comprises implanting oxygen only to said predetermined depth and dose in the range about 2×10 15 ions/cm 2 to about 10 16 ions/cm 2 at energies in the range about 20-40 keV, O + equivalent.
Claim 4
Independent Claim 84 words
A method for preventing hillock formation in polycrystalline semiconductor layers comprising: providing a substrate having thereon a polycrystalline semiconductor layer with an exposed surface; implanting oxygen into said exposed surface only in a near surface region of said polycrystalline layer corresponding to an implant energy in the range about 10-50 keV, O + equivalent, and to a peak concentration within the polycrystalline semiconductor layer in the range of about 7×10 19 atoms/cm 3 to 3×10 20 atoms/cm 3 ; and thereafter heating said layer.
Claim 5
Independent Claim 84 words
A method for preventing hillock formation in polycrystalline semiconductor layers comprising: providing a substrate having thereon a polycrystalline semiconductor layer with an exposed surface; implanting oxygen into said exposed surface only in a near surface region of said polycrystalline layer corresponding to an implant energy in the range about 10-50 keV, O + equivalent, and to a peak concentration within the polycrystalline semiconductor layer in the range of about 7×10 19 atoms/cm 3 to 3×10 20 atoms/cm 3 ; and thereafter heating said layer.

References Cited (Backward Citations)

US4171997A Cited
JPS5618430A Cited
US4704367A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-04-26 1991-10-26 1992-04-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-04-26 1995-10-26 1996-04-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-04-26 1999-10-26 2000-04-26 $7700.00 Window Closed / Lapsed

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