Protection of integrated circuits from electric discharge

Claim 2

A semiconductor integrated structure for protecting from electrical discharges of electrostatic origin components of an integrated circuit, comprising a single crystal substrate of semiconductor material and a layer epitaxially grown on said substrate wherein said circuital components are formed, characterized by comprising two zener junctions between a buried region, heavily doped with an impurity of a first type of conductivity, isolated from the semiconductor material of the substrate by a bottom isolation buried layer doped with an impurity of a second type of conductivity and, respectively, two distinct diffused regions heavily doped with an impurity of a second type of conductivity; said two distinct diffused regions being isolated one from the other and from other regions of said epitaxially grown layer by isolation regions, heavily doped with an impurity of said first type of conductivity, connected to said buried region; one of said diffused regions being electrically connected to a pad of the integrated circuit and the other being electrically connected to a metallization layer constituting a common potential node of said integrated circuit.

Claim 3

The structure of claim 1 being formed, substantially, in the epitaxially grown layer directly underneath a metallized area constituting said pad.

Claim 4

A semiconductor integrated circuit comprising a monocrystalline semiconductor substrate and a layer epitaxially grown on said substrate wherein a plurality of circuital components are formed, some of which being directly connected to pads destined for the connection of leads, characterized in that in a region directly underneath the area of at least one of said pads there is a protection structure against discharges of electrostatic origin formed by two zener junctions between a buried region, heavily doped with an impurity of a first type of conductivity, isolated from the substrate by a bottom isolation buried layer doped with an impurity of a second type of conductivity and, respectively, two distinct diffused regions heavily doped with an impurity of a second type of conductivity; said two distinct diffused regions being isolated one from the other and from other regions of said epitaxially grown layer by isolation regions, heavily doped with an impurity of said first type of conductivity, connected to said buried region; one of said diffused regions being electrically connected to said pad of the integrated circuit and the other being electrically connected to a metallization layer constituting a common potential node of said integrated circuit.

Claim 5

A semiconductor integrated circuit comprising a monocrystalline semiconductor substrate and a layer epitaxially grown on said substrate wherein a plurality of circuital components are formed, some of which being directly connected to pads destined for the connection of leads, characterized in that in a region directly underneath the area of at least one of said pads there is a protection structure against discharges of electrostatic origin formed by two zener junctions between a buried region, heavily doped with an impurity of a first type of conductivity, isolated from the substrate by a bottom isolation buried layer doped with an impurity of a second type of conductivity and, respectively, two distinct diffused regions heavily doped with an impurity of a second type of conductivity; said two distinct diffused regions being isolated one from the other and from other regions of said epitaxially grown layer by isolation regions, heavily doped with an impurity of said first type of conductivity, connected to said buried region; one of said diffused regions being electrically connected to said pad of the integrated circuit and the other being electrically connected to a metallization layer constituting a common potential node of said integrated circuit.