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US4739281A Expired / Lapsed US ⏱️ 0.0 years remaining

Analog buffer amplifier

Assignee: Analog Devices Inc
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Filing: 1986-08-28
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Granted: 1988-04-19
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Expires: 2006-08-28
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Abstract

Abstract An analog buffer amplifier for supplying an output voltage which closely follows an applied input voltage. The amplifier is characterized by a buffer output stage capable of providing both source and sink current over wide voltage swings together with circuit means for detecting slew conditions to enhance slew rate.

Inventors

  • 👤 John G. Doyle

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 06:16
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/50; H03F3/505; H03F3/30; H03F3/3001

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 179 words
A buffer amplifier having an input terminal and an output terminal for producing a voltage at said output terminal which closely follows a voltage applied to said input terminal, said buffer amplifier comprising: amplifier means having a first stage and a second stage, each stage having an input point and an output point, said first stage input point comprising said input terminal and said first stage output point being connected to said second stage input point; output buffer means including a first output transistor having an input point and an output point respectively connected to said second stage output point and said output terminal for supplying current in a first direction to said output terminal; a second output transistor having an input point and an output point respectively connected to said first stage output point and said output terminal for supplying current in a section direction to said output terminal; and slew detect means responsive to a voltage difference between said input and output terminals exceeding a certain threshold for varying a bias current supplied to said amplifier means.
Claim 2
Dependent Claim 179 words
A buffer amplifier having an input terminal and an output terminal for producing a voltage at said output terminal which closely follows a voltage applied to said input terminal, said buffer amplifier comprising: amplifier means having a first stage and a second stage, each stage having an input point and an output point, said first stage input point comprising said input terminal and said first stage output point being connected to said second stage input point; output buffer means including a first output transistor having an input point and an output point respectively connected to said second stage output point and said output terminal for supplying current in a first direction to said output terminal; a second output transistor having an input point and an output point respectively connected to said first stage output point and said output terminal for supplying current in a section direction to said output terminal; and slew detect means responsive to a voltage difference between said input and output terminals exceeding a certain threshold for varying a bias current supplied to said amplifier means.
Claim 3
Dependent Claim 26 words
The buffer amplifier of claim 1 wherein said amplifier means comprises a high gain operational amplifier including complementary field effect transistors implemented on a common substrate.
Claim 4
Dependent Claim 24 words
The buffer amplifier of claim 2 wherein said first and second output transistors each comprises a field effect transistor implemented on said common substrate.
Claim 5
Dependent Claim 72 words
The buffer amplifier of claim 3 wherein each of said first and second output transistors includes gate, source, and drain electrodes and wherein said first and second output transistor gate electrodes comprise said input points and said first and second output transistor source and drain electrodes respectively comprise said output points; and means respectively connecting said first and second output transistor drain and source electrodes respectively to supply potentials of opposite polarity.
Claim 6
Dependent Claim 40 words
The buffer amplifier of claim 1 wherein said slew detect means includes a field effect transistor having gate, source, and drain electrodes; and wherein said slew detect transistor gate and source electrodes are connected across said input and output terminals.
Claim 7
Dependent Claim 109 words
A buffer amplifier having an input terminal and an output terminal for producing a voltage at said output terminal which closely follows a voltage applied to said input terminal, said buffer amplifier comprising: amplifier means having an input point connected to said input terminal, and an output point; output buffer means having an input point connected to said amplifier means output point for supplying current to said output terminal; and slew detect means defining a certain threshold and responsive to a voltage difference between said input and output terminals exceeding said threshold for varying a current supplied to said amplifier means to modify the voltage at said output terminal.
Claim 8
Dependent Claim 109 words
A buffer amplifier having an input terminal and an output terminal for producing a voltage at said output terminal which closely follows a voltage applied to said input terminal, said buffer amplifier comprising: amplifier means having an input point connected to said input terminal, and an output point; output buffer means having an input point connected to said amplifier means output point for supplying current to said output terminal; and slew detect means defining a certain threshold and responsive to a voltage difference between said input and output terminals exceeding said threshold for varying a current supplied to said amplifier means to modify the voltage at said output terminal.
Claim 9
Dependent Claim 40 words
The buffer amplifier of claim 6 wherein said slew detect means includes a field effect transistor having gate, source, and drain electrodes; and wherein said slew detect transistor gate and source electrodes are connected across said input and output terminals.
Claim 10
Dependent Claim 26 words
The buffer amplifier of claim 6 wherein said amplifier means comprises a high gain operational amplifier including complementary field effect transistors implemented on a common substrate.
Claim 11
Dependent Claim 21 words
The buffer amplifier of claim 8 wherein said slew detect means includes a field effect transistor implemented on said common substrate.
Claim 12
Dependent Claim 35 words
The buffer amplifier of claim 9 wherein said slew detect transistor has gate, source and drain electrodes; and wherein said slew detect transistor gate and source electrodes are connected across said input and output terminals.

References Cited (Backward Citations)

US2994832A Cited
US3550025A Cited
US4240040A Cited
US4096398A Cited
US4542348A Cited
US4636743A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-04-19 1991-10-19 1992-04-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-04-19 1995-10-19 1996-04-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-04-19 1999-10-19 2000-04-19 $7700.00 Window Closed / Lapsed

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