Boost signal generator with bootstrap means

Claim 2

A semiconductor boost signal generator circuit, comprising: boost potential generating means for providing at an output node thereof an output voltage V p higher than a source voltage; an MOS transistor for producing a signal to be boosted, said MOS transistor having a gate electrode, a first main electrode connected to said output node of said boost potential generating means, and a second main electrode connected to a load capacitor; bootstrap control means having at least one input node connected to said second main electrode of said MOS transistor and an output node whose potential varies from a first level to a second level when a potential of said second main electrode of said MOS transistor becomes equal to or greater than a predetermined level; and bootstrap means having an input node connected to said output node of said bootstrap control means and a bootstrap output node connected to said gate electrode for producing at said bootstrap output node an unboosted signal at a potential enabling said MOS transistor to be turned on, and for boosting the potential of said signal when said output node of said bootstrap control means assumes said second level.

Claim 3

The semiconductor boost signal generator circuit of claim 1, wherein said bootstrap means comprises: signal potential generating means for providing said unboosted signal at said bootstrap output node; a first MOS transistor having a gate electrode connected to said bootstrap output node, a first main electrode connected to a first potential, and a second main electrode; a second MOS transitor having a gate electrode connected to said bootstrap output node, a first main electrode connected to said second main electrode of said first MOS transistor, and a second main electrode connected to a second potential; and a bootstrap capacitor connected between said bootstrap output node and said second main electrode of said first MOS transistor.

Claim 4

The semiconductor boost signal generator circuit of claim 1, wherein said bootstrap control means comprises a load element connected between a first potential and said output node of said bootstrap control means, and a third MOS transistor having a gate electrode connected to said input node of said bootstrap control means and first and second main electrodes connected between said output node of said bootstrap control means and a second potential.

Claim 5

The semiconductor boost signal generator circuit of claim 1, wherein said load element comprises a fourth MOS transistor having a gate electrode supplied with a precharge signal.

Claim 6

A semiconductor boost signal generator circuit, comprising; a bootstrap circuit comprising a first MOS transistor having a drain connected to a power source and a gate and a source connected to each other through a capacitor having a capacitance substantially larger than a gate capacitance of said first MOS transistor, a second MOS transistor having a drain connected to said source of said first MOS transistor and a source connected to ground; a charging device for charging said gate of said first MOS transitor; a dynamic inverter circuit comprising a third MOS transistor having a drain connected to said power source and a gate supplied with a precharge signal, and a fourth MOS transistor having a gate connected to a boost signal source, a drain connected to said source of said third MOS transistor and to said gate of said second MOS transistor and a source connected to ground; a boost potential generator; and a fifth MOS transistor having a drain supplied with a boost output from said boost voltage generator, a gate connected to said gate of said first MOS transistor and a source connected to said gate of said fourth MOS transistor, said source of said fifth MOS transistor constituting said boost signal source.

Claim 7

A semiconductor boost signal generator circuit, comprising; a bootstrap circuit comprising a first MOS transistor having a drain connected to a power source and a gate and a source connected to each other through a capacitor having a capacitance substantially larger than a gate capacitance of said first MOS transistor, a second MOS transistor having a drain connected to said source of said first MOS transistor and a source connected to ground; a charging device for charging said gate of said first MOS transitor; a dynamic inverter circuit comprising a third MOS transistor having a drain connected to said power source and a gate supplied with a precharge signal, and a fourth MOS transistor having a gate connected to a boost signal source, a drain connected to said source of said third MOS transistor and to said gate of said second MOS transistor and a source connected to ground; a boost potential generator; and a fifth MOS transistor having a drain supplied with a boost output from said boost voltage generator, a gate connected to said gate of said first MOS transistor and a source connected to said gate of said fourth MOS transistor, said source of said fifth MOS transistor constituting said boost signal source.