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Failsafe logic circuit wherein the phototransistor of a preceding optocoupler is connected in series with the photodiode of a succeeding optocoupler

Assignee: Fresenius SE and Co KGaA
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Filing: 1986-05-28
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Granted: 1988-03-15
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Expires: 2006-05-28
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Abstract

Abstract Failsafe logic circuits, for instance AND-, NOR-, NAND- and OR-circuits are devised at which at least one signal input is connected to a signal output via an optocoupler. Herewith dimensioning problems with respect to transistors and coupling capacitors as known from conventional failsafe logic circuits do not appear. Further on an optocoupler cannot fail in such a manner that between a photodiode and a phototransistor a galvanic coupling may arise.

Inventors

  • 👤 Hans-Jurgen Neumann
  • 👤 Artur Meisberger

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 18:14
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/14; H03K17/00; H03K17/51; H03K17/78; H03K17/795; H03K17/7955; H03K19/007

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 220 words
Failsaft AND or NOR logic circuit comprising: a combinatorial logic circuit having at least one signal input and only one ultimate signal output, said combinatorial logic circuit including optocouplers as coupling elements by which said at least one signal input of said combinatorial logic circuit is connected with said ultimate signal output according to the implemented logic circuit; an alternating voltage source connected to said combinatorial logic circuit to activate the combinatorial logic circuit according to said alternating voltage; and an AC signal conductive component responsive to said alternating voltage and connected to the output of said combinatorial logic circuit for passing only alternating current signals; wherein one optocoupler is provided per signal input whereat the signal inputs of said combinatorial logic circuit are applied to the cathodes or anodes of photodiodes of said optocouplers, each said optocoupler having a single transmitter and a single receiver and being unrestricted as to control frequency of timed input pulses; wherein said optocouplers are arranged in a series circuit with the phototransistor of a preceding optocoupler being in a series connection with the photodiode of a succeeding optocoupler; and wherein the photodiode of the first optocoupler is fed by the alternating voltage of said alternating voltage source and the phototransistor of the last optocoupler provides the ultimate signal output of the combinatorial logic.
Claim 2
Dependent Claim 220 words
Failsaft AND or NOR logic circuit comprising: a combinatorial logic circuit having at least one signal input and only one ultimate signal output, said combinatorial logic circuit including optocouplers as coupling elements by which said at least one signal input of said combinatorial logic circuit is connected with said ultimate signal output according to the implemented logic circuit; an alternating voltage source connected to said combinatorial logic circuit to activate the combinatorial logic circuit according to said alternating voltage; and an AC signal conductive component responsive to said alternating voltage and connected to the output of said combinatorial logic circuit for passing only alternating current signals; wherein one optocoupler is provided per signal input whereat the signal inputs of said combinatorial logic circuit are applied to the cathodes or anodes of photodiodes of said optocouplers, each said optocoupler having a single transmitter and a single receiver and being unrestricted as to control frequency of timed input pulses; wherein said optocouplers are arranged in a series circuit with the phototransistor of a preceding optocoupler being in a series connection with the photodiode of a succeeding optocoupler; and wherein the photodiode of the first optocoupler is fed by the alternating voltage of said alternating voltage source and the phototransistor of the last optocoupler provides the ultimate signal output of the combinatorial logic.
Claim 3
Dependent Claim 193 words
Failsafe AND or NOR logic circuit comprising: a combinatorial logic circuit having at least one signal input and only one ultimate signal output, said combinatorial logic circuit including optocouplers as coupling elements by which said at least one signal input of said combinatorial logic circuit is connected with said ultimate signal output according to the implemented logic circuit; an alternating voltage source connected to said combinatorial logic circuit to activate the combinatorial logic circuit according to said alternating voltage; and an AC signal conductive component responsive to said alternating voltage and connected to the output of said combinatorial logic circuit for passing only alternating current signals; wherein one optocoupler is provided per signal input whereat the signal inputs of said combinatorial logic circuit are applied to the collectors or emitters of phototransistors of said optocouplers, each said optocoupler having a single transmitter and a single receiver and being unrestricted as to control frequency of timed input pulses; and wherein said phototransistors of said optocouplers are arranged in a parallel circuit and said photodiodes of said optocouplers are arranged in a series connection with respect to each other and to the alternating voltage source.
Claim 4
Dependent Claim 193 words
Failsafe AND or NOR logic circuit comprising: a combinatorial logic circuit having at least one signal input and only one ultimate signal output, said combinatorial logic circuit including optocouplers as coupling elements by which said at least one signal input of said combinatorial logic circuit is connected with said ultimate signal output according to the implemented logic circuit; an alternating voltage source connected to said combinatorial logic circuit to activate the combinatorial logic circuit according to said alternating voltage; and an AC signal conductive component responsive to said alternating voltage and connected to the output of said combinatorial logic circuit for passing only alternating current signals; wherein one optocoupler is provided per signal input whereat the signal inputs of said combinatorial logic circuit are applied to the collectors or emitters of phototransistors of said optocouplers, each said optocoupler having a single transmitter and a single receiver and being unrestricted as to control frequency of timed input pulses; and wherein said phototransistors of said optocouplers are arranged in a parallel circuit and said photodiodes of said optocouplers are arranged in a series connection with respect to each other and to the alternating voltage source.
Claim 5
Dependent Claim 29 words
Failsafe logic circuit according to claim 1 or 2, further comprises an AC responsive output circuit connected via an amplifier circuit to the output of the combinatorial logic circuit.
Claim 6
Dependent Claim 23 words
Failsafe logic circuit according to claim 3 further including an isolation capacitor between the combinatorial logic circuit and AC responsive output circuit means.
Claim 7
Dependent Claim 17 words
Failsafe logic circuit according to claim 4, wherein the AC responsive output circuit means comprises rectifier means.
Claim 8
Dependent Claim 59 words
Failsafe logic circuit according to claim 1, 2 or 5 characterized by a tandem arrangement of an AND and a NOR circuit to which the signal inputs are commonly connected, said tandem arrangement comprising an indicator optocoupler as the last optocoupler of the chain serving for signal transmission to the AC responsive component as well as for alarm indication.

References Cited (Backward Citations)

US2900574A Cited
US2895054A Cited
US2907001A Cited
US2900522A Cited
US2984749A Cited
US2997596A Cited
US3078373A Cited
US3020410A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-03-15 1991-09-14 1992-03-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-03-15 1995-09-14 1996-03-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-03-15 1999-09-14 2000-03-15 $7700.00 Window Closed / Lapsed

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