Digital system simulation method and apparatus

Claim 2

Apparatus for simulating the behavior of a digital circuit, the digital circuit having a plurality of connected circuit elements, said apparatus having means for defining said circuit elements comprising means for defining inputs to said circuit elements having at least four signal levels, said levels including a "0" signal level, a "1" signal level, a high impedance "Z" signal level, and an unknown "X" signal level, means connected to said input defining means for defining outputs of said circuit elements based upon said input signals, and said outputs having at least said four signal levels, and said output defining means including means for providing a "0" or a "1" output signal level even though one or more input signal levels have thereon a "Z" or an "X" signal level.

Claim 3

The simulation apparatus of claim 1 further comprising memory means connected to said input defining means for storing predefined input-output relationships for standard circuit building blocks, and means connected to said output defining means for serially determining on a bit-by-bit basis outputs of at least one said circuit element.

Claim 4

The simulation apparatus of claim 2 wherein said circuit elements include digital adders.

Claim 5

The simulation apparatus of claim 2 wherein said circuit elements include digital subtractors.

Claim 6

The simulation apparatus of claim 2 wherein said circuit elements include ANDing and ORing circuitry.

Claim 9

The simulation method of claim 6 further comprising the step of providing definitions of said input and output signal levels for a digital addition circuitry.

Claim 10

The simulation method of claim 6 further comprising the step of storing in said memory means input and output signal level definitions for a digital subtraction circuit.

Claim 11

The simulation method of claim 6 further comprising the step of providing input and output definitions for ANDing and ORing circuitry.

Claim 12

The simulation method of claim 6 further comprising the step of storing in said memory means at least one standard building block defined relationship, said defined standard building block defined relationship having a first input port, a second input prot, and a carry-in input port, and a first output port and a carry-out output port.

Claim 15

Apparatus for simulating the behavior of a digital circuit, the digital circuit having a plurality of connected circuit elements, comprising input-defining means means for defining inputs to said circuit elements, output-defining means connected to said input-defining means for defining output signal levels for outputs of said circuit elements based upon defined relationships with said inputs, relationship-establishing means connected to said output-defining means for establishing functional relationships between at least some of said circuit element inputs and outputs, table look-up means connected to said relationship-establishing means for storing said functional relationships of said establishing means as a plurality of table entries, each entry having an address which is a function of the inputs to a said circuit element, said table having plural output entries for at least one combination of inputs defining a table entry address, said table entry being addressed by said inputs.

Claim 16

Apparatus for simulating the behavior of a digital circuit, the digital circuit having a plurality of connected circuit elements, comprising input-defining means means for defining inputs to said circuit elements, output-defining means connected to said input-defining means for defining output signal levels for outputs of said circuit elements based upon defined relationships with said inputs, relationship-establishing means connected to said output-defining means for establishing functional relationships between at least some of said circuit element inputs and outputs, table look-up means connected to said relationship-establishing means for storing said functional relationships of said establishing means as a plurality of table entries, each entry having an address which is a function of the inputs to a said circuit element, said table having plural output entries for at least one combination of inputs defining a table entry address, said table entry being addressed by said inputs.

Claim 17

The simulation apparatus of claim 12 further comprising means for automatically combining separate defined functional relationships in said table wherein each of a plurality of outputs is generated from common inputs.

Claim 18

The simulation apparatus of claim 12 wherein said table comprises a table entry which depends upon the state of the circuit element inputs and outputs.

Claim 21

The simulation method of claim 15 further comprising the steps of indexing to a memory address based upon the inputs and outputs of a said circuit element, and using said memory address for updating values of plural outputs of said circuit element.

Claim 22

The simulation method of claim 16 further comprising the step of using pointers stored in said memory addresses for updating said plural outputs of said circuit element.

Claim 23

The simulation method of claim 15 further comprising the step of associating with each table entry, as its input address, the present state of the circuit element inputs and outputs.

Claim 24

The simulation method of claim 15 further comprising the step of automatically combining separately defined functional relationships in said table for a circuit element wherein outputs of said circuit element are defined by common inputs.

Claim 25

Apparatus for simulating the behavior of connected circuit elements, comprising means for defining inputs to said circuit elements, having at least four signal levels, said levels including a "0" signal level, a "1" signal level, a high impedance "Z" signal level, and an unknown "X" signal level means connected to said input defining means for defining outputs of said circuit elements based upon said input signals, said output having at least four signal levels, wherein said circuit elements include standard circuit building blocks having as inputs, a second input port, and a carry-in port, and as outputs, at least a first output port, and a carry-out port, said output defining means comprising means for providing a "0" or a "1" output signal level event through one or more input signal levels have thereon a "Z" or an "X" signal level, memory means connected to said input-defining means for storing predefined input-output relationships for standard circuit building block, and means connected to said output-defining means for serially determining on a bit-by-bit basis outputs of a connected circuit elements.

Claim 26

Apparatus for simulating the behavior of connected circuit elements, comprising means for defining inputs to said circuit elements, having at least four signal levels, said levels including a "0" signal level, a "1" signal level, a high impedance "Z" signal level, and an unknown "X" signal level means connected to said input defining means for defining outputs of said circuit elements based upon said input signals, said output having at least four signal levels, wherein said circuit elements include standard circuit building blocks having as inputs, a second input port, and a carry-in port, and as outputs, at least a first output port, and a carry-out port, said output defining means comprising means for providing a "0" or a "1" output signal level event through one or more input signal levels have thereon a "Z" or an "X" signal level, memory means connected to said input-defining means for storing predefined input-output relationships for standard circuit building block, and means connected to said output-defining means for serially determining on a bit-by-bit basis outputs of a connected circuit elements.

Claim 29

Apparatus for simulating the behavior of a digital circuit, the digital circuit having a plurality of connected circuit elements, said apparatus comprising means for defining inputs to said circuit elements, means connected to said input-defining means for defining output signal levels of outputs of said circuit elements, each said circuit element having a defined input/output casual relationship, means connected to said input-output means and with said output-defining means for tracing the signal value of at least one of said circuit element inputs and outputs for at least a selected change of condition of a logical combination of said inputs and outputs, said tracing means comprising means for evaluating the occurrence of at least one selected Boolean relationship among said combination of inputs and outputs, and means coupled with said tracing means and responsive thereto for displaying messages describing said traced circuit element inputs and outputs at times when said selected condition is attained, said displaying means comprising means for displaying said trace message whenever at least a portion of a memory element is updated with changed data, and means responsive to said evaluating means for displaying said trace message whenever said Boolean relationship is satisfied.

Claim 30

Apparatus for simulating the behavior of a digital circuit, the digital circuit having a plurality of connected circuit elements, said apparatus comprising means for defining inputs to said circuit elements, means connected to said input-defining means for defining output signal levels of outputs of said circuit elements, each said circuit element having a defined input/output casual relationship, means connected to said input-output means and with said output-defining means for tracing the signal value of at least one of said circuit element inputs and outputs for at least a selected change of condition of a logical combination of said inputs and outputs, said tracing means comprising means for evaluating the occurrence of at least one selected Boolean relationship among said combination of inputs and outputs, and means coupled with said tracing means and responsive thereto for displaying messages describing said traced circuit element inputs and outputs at times when said selected condition is attained, said displaying means comprising means for displaying said trace message whenever at least a portion of a memory element is updated with changed data, and means responsive to said evaluating means for displaying said trace message whenever said Boolean relationship is satisfied.

Claim 33

Apparatus for simulating the behavior of a digital circuit, the digital circuit having a plurality of connected circuit elements, comprising means for defining inputs to said circuit elements, means for defining output signal levels for outputs of said circuit elements based upon defined relationships with said inputs, and means for establishing functional relationships between at least some of said circuit element inputs and outputs, a table look-up means for storing said functional relationships of said establishing means as a plurality of table entries, each entry having an address which is a function of the inputs to a said circuit element, means for automatically combining separate defined functional relationships in said table wherein each of a plurality of outputs is generated from common inputs, said table having plural output entries for at least one combination of inputs defining a table entry address, said table entry being addressed by said inputs, and wherein said table comprises a table entry which depends upon the state of the circuit element inputs and outputs.

Claim 34

Apparatus for simulating the behavior of a digital circuit, the digital circuit having a plurality of connected circuit elements, comprising means for defining inputs to said circuit elements, means for defining output signal levels for outputs of said circuit elements based upon defined relationships with said inputs, and means for establishing functional relationships between at least some of said circuit element inputs and outputs, a table look-up means for storing said functional relationships of said establishing means as a plurality of table entries, each entry having an address which is a function of the inputs to a said circuit element, means for automatically combining separate defined functional relationships in said table wherein each of a plurality of outputs is generated from common inputs, said table having plural output entries for at least one combination of inputs defining a table entry address, said table entry being addressed by said inputs, and wherein said table comprises a table entry which depends upon the state of the circuit element inputs and outputs.