Patent US4716381A successfully refreshed from Google Patents.
US4716381A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High-current operational amplifier
Assignee: Advanced Micro Devices Inc
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Filing: 1986-04-03
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Granted: 1987-12-29
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Expires: 2006-04-03
Abstract
Abstract An operational amplifier suitable for inclusion in an integrated circuit device operating as a transceiver at a coaxial media interface to a network meeting IEEE 802.3 standards. To be included in an integrated circuit package the operational amplifier must have low-power consumption and yet generate up to 80 mA of current onto the network. A design method achieves this goal, producing an operational amplifier having three independently-positioned, isolated, poles. A current generator and level shifter is employed with the operational amplifier which generates a current precisely proportional to a "collision" reference voltage, the current is compensated for changes in temperature and for variations in transistor gain (hFE). A very wide band level shifter matches the current generated to the requirements of the operational amplifier so that 10% to 90% changes in current generated by the op amp can occur in 1/2 to 3/4 of a nanosecond, yet the level shifter does not consume much power. The current generator provides a single point of circuit element control for compensating for hFE variation in three transistors used within the current generator. The level shifter employs current-steering to produce the switched current which is exceptionally fast and low in asymmetry. The process used in integrated circuit manufacture permits tight control of the elements within the operational amplifier so that parameters can be held within 2% of the tolerances specified in the IEEE 802.3 standards without need of field "trimming".
Inventors
- 👤 David L. Campbell
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 23:02
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/08; H03F1/083; H03F1/42; H03F1/48
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
350 words
In an integrated circuit transceiver, including a differential operational amplifier generating signals to be transmitted over a node meeting IEEE 802.3 standards, a circuit which translates a reference voltage from positive ground to negative ground and generates a current-gain (h FE )- and and temperature-compensated output current received by said operational amplifier constant within an operating voltage range and proportional to said reference voltage, comprising a current generator circuit and a level-shifter circuit, said current generator circuit comprising: a first transistor having a base terminal connected to said reference voltage, an emitter terminal coupled through a first resistance element to a tap shield terminal, and a collector terminal; and compensation means comprising: a second transistor having an emitter terminal, a collector terminal connected to a first voltage supply, and a base terminal coupled to said first voltage supply through a second resistance element; a third transistor having a collector terminal, a base terminal coupled to said third transistor collector terminal through a third resistance element, and an emitter terminal coupled to said first voltage supply through a fourth resistance element; a fourth transistor having a base terminal connected to said third transistor collector terminal, an emitter terminal coupled to said first voltage supply through a fifth resistance element, and a collector terminal; a series of two diode-connected transistors, a first of said series having its anode terminal connected to said first transistor collector terminal and a second of said series having a cathode coupled to said second transistor emitter terminal through a sixth resistance element; and a fifth transistor having a base terminal connected to said first transistor collector terminal, an emitter terminal coupled to said third transistor collector through a seventh resistance element, and a collector whereby an intermediate current is conducted by, and an h FE -compensated base voltage generated at, said fourth transistor collector terminal and a negative-ground translated reference voltage generated at said fifth transistor collector terminal, said level-shifter comprising means responsive to differential input signals, said negative-ground translated reference voltage and said h FE -compensated base voltage and intermediate current, for generating said output current.
Claim 2
Dependent Claim
350 words
In an integrated circuit transceiver, including a differential operational amplifier generating signals to be transmitted over a node meeting IEEE 802.3 standards, a circuit which translates a reference voltage from positive ground to negative ground and generates a current-gain (h FE )- and and temperature-compensated output current received by said operational amplifier constant within an operating voltage range and proportional to said reference voltage, comprising a current generator circuit and a level-shifter circuit, said current generator circuit comprising: a first transistor having a base terminal connected to said reference voltage, an emitter terminal coupled through a first resistance element to a tap shield terminal, and a collector terminal; and compensation means comprising: a second transistor having an emitter terminal, a collector terminal connected to a first voltage supply, and a base terminal coupled to said first voltage supply through a second resistance element; a third transistor having a collector terminal, a base terminal coupled to said third transistor collector terminal through a third resistance element, and an emitter terminal coupled to said first voltage supply through a fourth resistance element; a fourth transistor having a base terminal connected to said third transistor collector terminal, an emitter terminal coupled to said first voltage supply through a fifth resistance element, and a collector terminal; a series of two diode-connected transistors, a first of said series having its anode terminal connected to said first transistor collector terminal and a second of said series having a cathode coupled to said second transistor emitter terminal through a sixth resistance element; and a fifth transistor having a base terminal connected to said first transistor collector terminal, an emitter terminal coupled to said third transistor collector through a seventh resistance element, and a collector whereby an intermediate current is conducted by, and an h FE -compensated base voltage generated at, said fourth transistor collector terminal and a negative-ground translated reference voltage generated at said fifth transistor collector terminal, said level-shifter comprising means responsive to differential input signals, said negative-ground translated reference voltage and said h FE -compensated base voltage and intermediate current, for generating said output current.
Claim 3
Dependent Claim
79 words
A current generator and level-shifter according to claim 1 wherein said level-shifter means comprises: first amplifier stage means responsive to said differential input signals for generating a pair of base currents; means coupled to said first amplifier stage for steering portions of said base currents to said first voltage supply; and second amplifier means responsive to non-steered portions of said base currents, to said h FE -compensated base voltage and to said intermediate current for generating said output current.
Claim 4
Dependent Claim
80 words
A current generator and level-shifter according to claim 2 wherein said current-steering means comprises a pair of NPN transistors interconnected at their bases, interconnected at their emitters, said interconnected emitters coupled to said first voltage supply through a resistance element, their collectors interconnected via a series-connected pair of resistors, the common junction of said resistors connected to said interconnected bases, said collectors each receiving said portion of said base current; said pair of NPN transistors operating in a non-saturated mode.
Claim 5
Dependent Claim
61 words
A current generator and level-shifter according to claim 3 wherein said second amplifier means comprises a pair of NPN transistors, their emitters interconnected and connected to said fourth transistor collector terminal, their bases connected to said respective collectors of said pair of current-steering transistors, said output current generated at the collector of a predetermined one of said second amplifier means transistors.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-12-28 | 1991-06-29 | 1991-12-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-12-28 | 1995-06-29 | 1995-12-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-12-28 | 1999-06-29 | 1999-12-29 | $7700.00 | Window Closed / Lapsed |