US4716303A
Expired / Lapsed
US
⏱️ 0.0 years remaining
MOS IC pull-up circuit
Assignee: Sharp Corp
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Filing: 1985-05-01
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Granted: 1987-12-29
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Expires: 2005-05-01
Abstract
Abstract In MOS ICs, particularly dynamic memory elements and the like which have a boosted signal, a pull-up circuit in the MOS IC is provided to statically hold the boosted signal output to the desired potential when power is turned on and during the active state.
Inventors
- 👤 Toshio Mimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 02:41
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H03K19/096; H03K17/00; H03K17/22; H03K17/223; H03K19/01; H03K19/017; H03K19/01728; H03K19/01735
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
208 words
A MOS IC pull-up circuit for statically holding a signal outputted during an active stage of a dynamic memory element, which signal has been boosted to a level at least equal to a power source voltage, comprising: a first MOSFET having a drain terminal connected to said power source and a gate terminal connected to a node of an active signal representative of said active stage; a second MOSFET having a drain terminal and a gate terminal both connected to a source terminal of said first MOSFET, and a source terminal connected to said boosted signal; a third MOSFET; a fourth MOSFET; a MOS capacitance; said MOS capacitance being connected between a source terminal of said third MOSFET and said source terminal of said first MOSFET, a gate terminal of said third MOSFET being connected to said boosted signal through a source-drain channel of said fourth MOSFET, a gate terminal of said fourth MOSFET being connected to said power source, and a periodic signal being connected to a drain terminal of said third MOSFET, said boosted signal being held at a level at least equal to said power source voltage during said active stage, through a boosting operation of said first through fourth MOSFETS and said MOS capacitance.
Claim 2
Dependent Claim
208 words
A MOS IC pull-up circuit for statically holding a signal outputted during an active stage of a dynamic memory element, which signal has been boosted to a level at least equal to a power source voltage, comprising: a first MOSFET having a drain terminal connected to said power source and a gate terminal connected to a node of an active signal representative of said active stage; a second MOSFET having a drain terminal and a gate terminal both connected to a source terminal of said first MOSFET, and a source terminal connected to said boosted signal; a third MOSFET; a fourth MOSFET; a MOS capacitance; said MOS capacitance being connected between a source terminal of said third MOSFET and said source terminal of said first MOSFET, a gate terminal of said third MOSFET being connected to said boosted signal through a source-drain channel of said fourth MOSFET, a gate terminal of said fourth MOSFET being connected to said power source, and a periodic signal being connected to a drain terminal of said third MOSFET, said boosted signal being held at a level at least equal to said power source voltage during said active stage, through a boosting operation of said first through fourth MOSFETS and said MOS capacitance.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-12-28 | 1991-06-29 | 1991-12-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-12-28 | 1995-06-29 | 1995-12-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-12-28 | 1999-06-29 | 1999-12-29 | $7700.00 | Window Closed / Lapsed |