US4714897A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Monolithically integratable signal amplifier stage with high output dynamics
Assignee: STMicroelectronics SRL
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Filing: 1985-12-17
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Granted: 1987-12-22
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Expires: 2005-12-17
Abstract
Abstract A monolithically integratable signal amplifier stage with high output dynamics includes first, second, and third bipolar NPN transistors and first and second current mirror circuits. The collector terminal of the first transistor is connected to the positive terminal of a supply voltage generator. The base terminal of the first transistor is in input terminal of the amplifier stage. The base terminals of the second and third transistors are connected to the emitter terminal of the first transistor, which is connected via first constant current generator to the negative terminal of the supply voltage generator. The second and third transistors also have their emitters connected to the negative terminal of the supply voltage generator. The input of the first current mirror circuit and the output of the second current mirror circuit are connected to the collector terminals of the third and second transistors. The output of the first current mirror circuit and the input of the second current mirror circuit are both connected via a second constant current generator to the negative terminal of the supply voltage generator.
Inventors
- 👤 Bruno Murari
- 👤 Mauro Pasetti
- 👤 Nazzareno Rossetti
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 19:59
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/08; H03F1/083; H03F3/00; H03F3/30; H03F3/3066; H03F3/3067
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
283 words
A monolithically integratable signal amplifier stage comprising a first and a second semiconductor circuit element, each having a first and a second terminal and a control terminal, said control terminal of said first circuit element being an input terminal of said amplifier stage; wherein said second terminal of said first circuit element is connected to a first terminal of a supply voltage generator, and said first terminal of said first circuit element is coupled to both said control terminal of said second circuit element and, via a first constant current generator, to a second terminal of said supply voltage generator to which is also connected said first terminal of said second circuit element; said signal amplifier also comprising a third semiconductor circuit element having a first and a second terminal and a control terminal and at least a first and a second current mirror circuit coupled to said first terminal of said supply voltage generator and each having an input and an output, said first terminal and control terminal of said third circuit element being respectively connected to said second terminal of said supply voltage generator and to said first terminal of said first circuit element, said input of said first current mirror circuit being connected to said second terminal of said third circuit element, and said output of said first current mirror circuit and said input of said second current mirror circuit are both connected to said second terminal of said supply voltage generator via a second constant current generator and said output of said second current mirror circuit and said second terminal of said second circuit element are connected together so as to constitute an output terminal of said amplifier stage.
Claim 2
Dependent Claim
283 words
A monolithically integratable signal amplifier stage comprising a first and a second semiconductor circuit element, each having a first and a second terminal and a control terminal, said control terminal of said first circuit element being an input terminal of said amplifier stage; wherein said second terminal of said first circuit element is connected to a first terminal of a supply voltage generator, and said first terminal of said first circuit element is coupled to both said control terminal of said second circuit element and, via a first constant current generator, to a second terminal of said supply voltage generator to which is also connected said first terminal of said second circuit element; said signal amplifier also comprising a third semiconductor circuit element having a first and a second terminal and a control terminal and at least a first and a second current mirror circuit coupled to said first terminal of said supply voltage generator and each having an input and an output, said first terminal and control terminal of said third circuit element being respectively connected to said second terminal of said supply voltage generator and to said first terminal of said first circuit element, said input of said first current mirror circuit being connected to said second terminal of said third circuit element, and said output of said first current mirror circuit and said input of said second current mirror circuit are both connected to said second terminal of said supply voltage generator via a second constant current generator and said output of said second current mirror circuit and said second terminal of said second circuit element are connected together so as to constitute an output terminal of said amplifier stage.
Claim 3
Dependent Claim
51 words
A signal amplifier stage according to claim 1, wherein said first and second and third semiconductor circuit elements each comprise at least one transistor having a first terminal, a second terminal and a control terminal coupled respectively to said first terminal, second terminal and control terminal of its respective circuit element.
Claim 4
Dependent Claim
70 words
A signal amplifier stage according to claim 2, wherein at least one of said current mirror circuits comprises a first and a second PNP transistor having base terminals which are connected to each other and having emitter terminals connected to said first terminal of said supply voltage generator, wherein collector terminals of these first and second PNP transistors are respectively said input and output of their respective current mirror circuit.
Claim 5
Dependent Claim
41 words
A signal amplifier stage according to claim 1, wherein at least one of said semiconductor circuit elements is a bipolar transistor whose emitter, collector and base terminals are respectively said first terminal, second terminal and control terminal of its respective element.
Claim 6
Dependent Claim
70 words
A signal amplifier stage according to claim 4, wherein at least one of said current mirror circuits comprises a first and a second PNP transistor having base terminals which are connected to each other and having emitter terminals connected to said first terminal of said supply voltage generator, wherein collector terminals of these first and second PNP transistors are respectively said input and output of their respective current mirror circuit.
Claim 7
Dependent Claim
39 words
A signal amplifier stage according to claim 1, wherein each of said semiconductor circuit elements is bipolar NPN transistor whose emitter, collector and base terminals are respectively said first terminal, second terminal and control terminal of its respective element.
Claim 8
Dependent Claim
70 words
A signal amplifier stage according to claim 6, wherein at least one of said current mirror circuits comprises a first and a second PNP transistor having base terminals which are connected to each other and having emitter terminals connected to said first terminal of said supply voltage generator, wherein collector terminals of these first and second PNP transistors are respectively said input and output of their respective current mirror circuit.
Claim 9
Dependent Claim
70 words
A signal amplifier stage according to claim 1, wherein at least one of said current mirror circuits comprises a first and a second PNP transistor having base terminals which are connected to each other and having emitter terminals connected to said first terminal of said supply voltage generator, wherein collector terminals of these first and second PNP transistors are respectively said input and output of their respective current mirror circuit.
References Cited (Backward Citations)
US4323797A
Cited
US4575686A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-12-21 | 1991-06-22 | 1991-12-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-12-21 | 1995-06-22 | 1995-12-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-12-21 | 1999-06-22 | 1999-12-22 | $7700.00 | Window Closed / Lapsed |