US4575686A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Output stage for power amplifiers
Assignee: STMicroelectronics SRL
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Filing: 1984-07-24
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Granted: 1986-03-11
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Expires: 2004-07-24
Abstract
Abstract The output stage for power amplifiers, in particular of the minimum drop, low tension type, is intended for use with apparatus which do not require a high output current, which output stage can operate at a lower minimum voltage supply than comparable known stages. The output stage comprises upper and lower sections interposed between a power supply line and a ground line, each section including transistors across which voltage drops (V CE sat, V BE ) appear and forming current sources for each section, diodes, and at least one current mirror circuit of the multiplying type adapted to determine as a first approximation the current gain of each section. The minimum voltage drop between the power supply line and ground line, as computed for any electric line connecting the power supply line and ground line, never exceeds the value of V BE +2V CE sat.
Inventors
- 👤 Sergio Palara
- 👤 Aldo Torazzina
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 21:57
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/30; H03F3/3066; H03F1/00; H03F1/02; H03F1/0205; H03F1/0261
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
291 words
An output stage for power amplifiers, comprising an input transistor in series with a first current source so as to define a first common point, a first section and a second section arranged in parallel between a power supply and ground, each section including: a first transistor having its base connected to said first common point; a second current source, said second current source of said first section being interposed between the emitter of said first transistor and the ground and said second current source of said second section being interposed between the emitter of said first transistor and the power supply; said second current source and said first transistor defining a second common point; at least one current mirror circuit formed by a first diode and a second transistor, said first diode of said first section being interposed between the collector of said first transistor and the power supply and said first diode of said second section being interposed between the collector of said first transistor and the ground, said second transistor of said first section having its emitter connected to the power supply, and said second transistor of said second section having its emitter connected to the ground; a second diode connected between said second common point and the collector of said second transistor, the second transistor of said first and second sections being connected together and to a stage output thereby the voltage of the power supply can drop up to the value defined by the following expression V.sub.BE +2×V.sub.CE sat wherein V BE represents the voltage across the base-emitter junction in the transistor forward region and V CE sat represents the voltage across the collector-emitter junction in the transistor saturation region, while maintaining the device in operation.
Claim 2
Dependent Claim
291 words
An output stage for power amplifiers, comprising an input transistor in series with a first current source so as to define a first common point, a first section and a second section arranged in parallel between a power supply and ground, each section including: a first transistor having its base connected to said first common point; a second current source, said second current source of said first section being interposed between the emitter of said first transistor and the ground and said second current source of said second section being interposed between the emitter of said first transistor and the power supply; said second current source and said first transistor defining a second common point; at least one current mirror circuit formed by a first diode and a second transistor, said first diode of said first section being interposed between the collector of said first transistor and the power supply and said first diode of said second section being interposed between the collector of said first transistor and the ground, said second transistor of said first section having its emitter connected to the power supply, and said second transistor of said second section having its emitter connected to the ground; a second diode connected between said second common point and the collector of said second transistor, the second transistor of said first and second sections being connected together and to a stage output thereby the voltage of the power supply can drop up to the value defined by the following expression V.sub.BE +2×V.sub.CE sat wherein V BE represents the voltage across the base-emitter junction in the transistor forward region and V CE sat represents the voltage across the collector-emitter junction in the transistor saturation region, while maintaining the device in operation.
Claim 3
Dependent Claim
17 words
An output stage according to claim 5, comprising a plurality of current mirror circuits arranged in cascade.
Claim 4
Dependent Claim
36 words
An output stage according to claim 5, wherein the diodes of said at least one current mirror circuit are formed by diode-connected transistors having emitters connected to respective resistors increasing the current gain of each section.
Claim 5
Dependent Claim
52 words
An output stage according to claim 5, further comprising a drive circuit interposed between said at least one current mirror circuit and said second current source for detecting variations in the output current demand and driving said second current source for changing the current supplied in accordance with said output current variations.
Claim 6
Dependent Claim
73 words
An output stage according to claim 4, wherein said drive circuit comprises a transistor having collector, base and emitter electrodes, said collector electrode of said drive circuit being connected to said second current source, said base electrode of said drive circuit being connected to the base of transistor forming said at least one current mirror circuit, and said emitter electrode of said drive circuit being connected to ground through an intervening stabilizing resistor.
References Cited (Backward Citations)
US4394625A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-03-10 | 1989-09-09 | 1990-03-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-03-10 | 1993-09-09 | 1994-03-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-03-10 | 1997-09-09 | 1998-03-11 | $7700.00 | Window Closed / Lapsed |