US4714844A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Logarithmic compression circuit
Assignee: Canon Inc
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Filing: 1986-04-04
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Granted: 1987-12-22
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Expires: 2006-04-04
Abstract
Abstract A logarithmic compression circuit comprising an operational amplifier and a transistor for logarithmic compression. One of the emitter and collector of the transistor is connected to the inverting input of the amplifier and the other of the emitter and collector of the transistor is connected to the output of the amplifier. A switching device is selectively connected between the base of the transistor and the non-inverting input of the amplifier and between the base and the said one of the emitter and collector of the transistor in accordance with the magnitude of a signal current input.
Inventors
- 👤 Kazuhiko Muto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 13:43
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/24
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
152 words
A logarithmic compression circuit comprising: an operational amplifier having inverting and noninverting inputs and an output; a transistor having an emitter, a collector and a base for logarithmic compression, one of the emitter and collector of said transistor being connected to the inverting input of said operational amplifier, the other of the emitter and collector of said transistor being connected to the output of said operational amplifier; and switching means, connected between the base of said transistor and the non-inverting input of said operational amplifier, for connecting the base of said transistor to the non-inverting input of said operational amplifier in response to a generation of a low level signal at the inverting input of said operational amplifier and for connecting the base of said transistor to the inverting input of said operational amplifier in response to a generation of a high level signal at the inverting input of said operational amplifier.
Claim 2
Dependent Claim
152 words
A logarithmic compression circuit comprising: an operational amplifier having inverting and noninverting inputs and an output; a transistor having an emitter, a collector and a base for logarithmic compression, one of the emitter and collector of said transistor being connected to the inverting input of said operational amplifier, the other of the emitter and collector of said transistor being connected to the output of said operational amplifier; and switching means, connected between the base of said transistor and the non-inverting input of said operational amplifier, for connecting the base of said transistor to the non-inverting input of said operational amplifier in response to a generation of a low level signal at the inverting input of said operational amplifier and for connecting the base of said transistor to the inverting input of said operational amplifier in response to a generation of a high level signal at the inverting input of said operational amplifier.
Claim 3
Dependent Claim
14 words
A circuit according to claim 1, wherein said switching means includes mechanical switching means.
Claim 4
Dependent Claim
15 words
A circuit according to claim 2, wherein said mechanical switching means includes an electromagnetic relay.
Claim 5
Dependent Claim
14 words
A circuit according to claim 1, wherein said switching means includes electronic switching means.
Claim 6
Dependent Claim
15 words
A circuit according to claim 4, wherein said electronic switching means includes a MOS FET.
Claim 7
Dependent Claim
14 words
A circuit according to claim 1, wherein said transistor is of the NPN type.
Claim 8
Dependent Claim
14 words
A circuit according to claim 1, wherein said transistor is of the PNP type.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-12-21 | 1991-06-22 | 1991-12-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-12-21 | 1995-06-22 | 1995-12-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-12-21 | 1999-06-22 | 1999-12-22 | $7700.00 | Window Closed / Lapsed |