Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
98 words
In an operational circuit which includes an operational amplifier, a plurality of feedback circuits and a swItching circuit for selectively coupling said feedback circuits between the output of said operational amplifier and the input thereof, the improvement comprising; a field effect transistor switching circuit including a plurality of high impedance input means connecting said plurality of feedback circuits to the input of said operational amplifier, said high impedance input means comprises gate electrodes of the field effect transistors, and switching means for causing feedback signals in selected feedback circuits to control the input signals to said operational amplifier.
Claim 2
Dependent Claim
98 words
In an operational circuit which includes an operational amplifier, a plurality of feedback circuits and a swItching circuit for selectively coupling said feedback circuits between the output of said operational amplifier and the input thereof, the improvement comprising; a field effect transistor switching circuit including a plurality of high impedance input means connecting said plurality of feedback circuits to the input of said operational amplifier, said high impedance input means comprises gate electrodes of the field effect transistors, and switching means for causing feedback signals in selected feedback circuits to control the input signals to said operational amplifier.
Claim 3
Dependent Claim
72 words
The operational circuit of claim 1 wherein said switching means includes switching transistors, coupled to said gate electrodes, said circuit further comprising control terminal means coupled to said switching transistors for selectively placing at least one of said switching transistors into a state of conduction to thereby block signals in the feedback circuit associated with the gate electrode coupled to the conducting transistor from controlling the input signals to said operational amplifier.
Claim 4
Dependent Claim
64 words
The operational circuit of claim 2, wherein said plurality of feedback circuits comprise a first feedback circuit including a first resistance means and a second feedback circuit including a capacitor said first and second feedback circuits being connected to first and second gate electrodes, said operational circuit further including, a first input terminal coupled through a second resistance means to said first gate electrode.
Claim 5
Dependent Claim
23 words
The operational circuit of claim 3 further including a second input terminal coupled through a third resistance means to said second gate electrode.
Claim 6
Dependent Claim
77 words
The operational circuit of claim 4 wherein said switching transistors are bipolar transistors, a first and second bipolar transistor being coupled to first and second gate electrodes, each of said bipolar transistors comprising a base, an emitter, a collector, the base of said bipolar transistors being coupled to said control terminal means for causing the selective switching of said bipolar transistors, the collector-emitter circuits of said bipolar transistors being connected to the first and second gate electrodes.
Claim 7
Dependent Claim
78 words
The operational circuit of claim 1 wherein said high impedance input means comprises at least first and second field effect transistors each comprising a gate, source, and drain electrodes, the source and drain electrodes of one of said field effect transistors being coupled respectively to the source and drain electrodes of the other of said field effect transistors, each of said plurality of feedback circuits being connected to a gate electrode of one of said field effect transistors.
Claim 8
Dependent Claim
78 words
The operational circuit of claim 2 wherein said operational circuit is a variable gain amplifier, said plurality of feedback circuits comprising a first feedback circuit including a first resistance means coupled to a first gate electrode and a second feedback circuit including a second resistance means coupled to a second gate electrode, third and fourth resistance means coupled respectively to said first and second gate electrodes and input terminal means coupled to said third and fourth resistance means.